Method for linking a hardware description to an IC layout

• US 5,971,595 A
• Filed: 04/28/1997
• Issued: 10/26/1999
• Est. Priority Date: 04/28/1997
• Status: Expired due to Term

• Current Assignee: Xilinx, Inc. (Advanced Micro Devices, Inc.)
• Original Assignee: Xilinx, Inc. (Advanced Micro Devices, Inc.)
• Inventors: Gray, John P., Grant, Douglas M.
• Primary Examiner(s): Teska, Kevin J.
• Assistant Examiner(s): GARBOWSKI, LEIGH M
• Application Number:
  US08/840,341
• Time in Patent Office: 911 Days
• Field of Search: 364/488, 364/489, 364/490, 364/491, 364/578
• US Class Current: 716/103
• CPC Class Codes: G06F 30/30 Circuit design
• CPC Class Codes: G06F 30/34 for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]
• CPC Class Codes: G06F 30/347 Physical level, e.g. placement or routing
• CPC Class Codes: G06F 30/39 Circuit design at the physical level physical level design for reconfigurable circuits G06F30/347

Abstract

A method and system for converting a hardware description language file which includes parameterized attributes into a product specification with hardware properties generated based on the parameters used to create/instantiate cells defined by the hardware description language file. The hardware properties are used by design tools to perform such functions as pre-place cells, route cells, and control the configuration of cells.

Claims

1. A computer program product, comprising:

a computer storage medium and a computer program code mechanism embedded in the computer storage medium for causing a computer to link a hardware description to an integrated circuit layout, the computer program code mechanism comprising;

a first computer code device configured to read parameterized attributes from a hardware description file;

a second computer code device configured to read cell instances from an original EDIF that does not contain hardware properties; and

a third computer code device configured to generate an augmented EDIF with evaluated hardware properties based on the parameterized attributes read by the first computer code device and the cell instances read by the second computer code device.

2. The computer program product as claimed in claim 1, further comprising a fourth computer code device configured to route the augmented EDIF.

3. The computer program product as claimed in claim 1, wherein one of the parameterized attributes is an attribute which is evaluated according to instantiation parameters of a corresponding one of the cell instances.

4. The computer program product as claimed in claim 1, wherein one of the parameterized attributes is an attribute which is evaluated according to instantiation parameters of a corresponding one of the cell instances, wherein the instantiation parameters are encoded into respective names of the cell instances in the original EDIF.

5. The computer program product as claimed in claim 1, wherein one of the parameterized attributes is an attribute which is evaluated mathematically according to instantiation parameters of a corresponding one of the cell instances.

6. The computer program product as claimed in claim 1, wherein one of the parameterized attributes is an attribute which is evaluated using text substitution according to instantiation parameters of a corresponding one of the cell instances.

7. The computer program product as claimed in claim 1, wherein one of the parameterized attributes is a relative location attribute for controlling placement of a corresponding one of the cell instances.

8. The computer program product as claimed in claim 1, wherein one of the parameterized attributes is a bounding box attribute for controlling routing of a corresponding one of the cell instances.

9. A computer program product, comprising:

a computer storage medium and a computer program code mechanism embedded in the computer storage medium for causing a computer to link a hardware description to an integrated circuit layout, the computer program code mechanism comprising;

a first computer code device configured to read a hardware description file including parameterized attributes; and

a second computer code device configured to generate an augmented EDIF with evaluated hardware properties based on the parameterized attributes read by the first computer code device.

10. The computer program product as claimed in claim 9, further comprising a third computer code device configured to route the augmented EDIF.

11. The computer program product as claimed in claim 9, wherein one of the parameterized attributes is an attribute which is evaluated according to instantiation parameters of a corresponding one of the cell instances.

12. The computer program product as claimed in claim 9, wherein one of the parameterized attributes is an attribute which is evaluated mathematically according to instantiation parameters of a corresponding one of the cell instances.

13. The computer program product as claimed in claim 9, wherein one of the parameterized attributes is an attribute which is evaluated using text substitution according to instantiation parameters of a corresponding one of the cell instances.

14. The computer program product as claimed in claim 9, wherein one of the parameterized attributes is a relative location attribute for controlling placement of a corresponding one of the cell instances.

15. The computer program product as claimed in claim 9, wherein one of the parameterized attributes is a bounding box attribute for controlling routing of a corresponding one of the cell instances.

16. A computer-implemented method comprising the steps of:

reading parameterized attributes from a hardware description file into a computer memory;

reading into the computer memory cell instances from an original EDIF that does not contain hardware properties; and

generating an augmented EDIF with evaluated hardware properties based on the parameterized attributes and the cell instances read into the computer memory.

17. The method as claimed in claim 16, further comprising the step of:

routing the augmented EDIF.

18. A computer-implemented method comprising the steps of:

reading into a computer memory a hardware description file including parameterized attributes; and

generating an augmented EDIF with evaluated hardware properties based on the parameterized attributes read into the computer memory.

19. The method as claimed in claim 18, further comprising the step of:

routing the augmented EDIF.