Method of manufacturing semiconductor device

• US 5,972,741 A
• Filed: 10/28/1997
• Issued: 10/26/1999
• Est. Priority Date: 10/31/1996
• Status: Expired due to Term

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Sanyo Electric Company Limited (Panasonic Holdings Corporation)
• Inventors: Saitou, Hiroaki, Odajima, Keita, Onda, Masahito, Kubo, Hirotoshi, Kitagawa, Masanao, Kuwako, Eiichiroh
• Primary Examiner(s): Niebling, John F.
• Assistant Examiner(s): LEBENTRITT, MICHAEL
• Application Number:
  US08/958,992
• Time in Patent Office: 728 Days
• Field of Search: 438/138, 438/268, 438/279, 438/700
• US Class Current: 438/138
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A first conductivity layer and a first insulating film are successively formed on a channel layer, and a photoresist film is formed on the first insulating film. The photoresist film is selectively exposed to light using a photomask and patterned. Using the patterned photoresist film as a mask, the first insulating film and the first conductivity layer are etched to form source electrodes from the first conductivity layer. Using the first insulating film and the source electrodes as a mask, an impurity of one conductivity type is diffused into exposed portions of the channel layer to form source regions. A second insulating film is formed in covering relation to side walls and upper surfaces of the source electrodes. Using the second insulating film as a mask, the channel layer and the common drain layer are etched to form trenches in the source regions, the channel layer, and the common drain layer. A third insulating film is formed on surfaces of the trenches, and a second conductive layer is formed as a gate electrode on the entire surface so as to fill up the trenches and cover the second insulating film.

Claims

1. A method of manufacturing a semiconductor device, comprising the steps of:

forming a channel layer of one conductivity type on a surface of a semiconductor substrate;

forming a mask layer having a plural of openings on said semiconductor substrate;

forming an insulating film on said mask layer to cover said openings of said mask layer;

etching said insulating film to form side walls beside walls of said openings of said mask layer;

etching said semiconductor substrate to form trenches extending through said channel layer of said semiconductor substrate using said side walls as a mask.

2. A method according to claim 1, wherein said mask layer is formed as a polysilicon or a polycide layer.

4. A method according to claim 1, wherein said first conductive layer is formed as a polysilicon or a polycide layer, and said first insulating film is formed as a silicon oxide film produced by oxidizing said first conductive layer.

5. A method according to claim 1, wherein said second insulating film is formed by oxidizing the entire surface to form a silicon oxide film and thereafter etching the entire surface to remove said silicon oxide film from said source regions thereby removing at least portions of said source regions.

6. A method according to claim 1, wherein said third insulating film is formed by oxidizing the surfaces of said trench to form a silicon oxide film as said third insulating film.

8. A method according to claim 5, wherein said first impurity and said second impurity are simultaneously thermally diffused.

3. A method of manufacturing a semiconductor device, comprising the steps of:

forming a common drain layer of one conductivity type on a surface of a semiconductor substrate of said one conductivity type;

diffusing a first impurity of a conductivity type different from said one conductivity type into an entire surface of said common drain layer to form a channel layer thereon;

forming a first conductivity layer on said channel layer;

forming a first insulating film on said first conductivity layer;

etching said first insulating film and said first conductivity layer to form source electrodes from said first conductivity layer,

diffusing a second impurity of said one conductivity type into exposed portions of said channel layer to form source regions, using said first insulating film and said source electrodes as a mask;

forming a second insulating film in covering relation to side walls and upper surfaces of said source electrode;

etching said channel layer and said common drain layer to form trenches in said source regions, said channel layer, and said common drain layer, using said second insulating film as a mask;

forming a third insulating film on surfaces of said trenches;

forming a second conductive layer as a gate electrode on the entire surface so as to fill up said trenches and cover said second insulating film; and

forming an interconnection layer on said second conductive layer.

7. A method of manufacturing a semiconductor device, comprising the steps of:

forming a common drain layer of one conductivity type on a surface of a semiconductor substrate of said one conductivity type;

forming a first conductive layer on said common drain layer;

forming a first insulating film on said first conductive layer;

removing the exposed portions of said first insulating film to form source electrodes from remaining portions of said first insulating film;

introducing a first impurity of a conductivity type different from said one conductivity type into exposed portions of said common drain layer, using said source electrodes as a mask, and diffusing said first impurity to form channel regions;

introducing a second impurity of said one conductivity type into said exposed portions of said common drain layer, using said source electrodes as a mask, and diffusing said second impurity to form source regions;

forming a second insulating film in covering relation to side walls and upper surfaces of said source electrodes;

forming trenches in said channel regions, said source regions, and said common drain layer;

forming a third insulating film on surfaces of said trenches; and

forming a second conductive layer as a gate electrode on the entire surface so as to fill up said trenches and cover said second insulating film.