Multiple gated MOSFET for use in DC-DC converter
First Claim
1. A multiple gated MOSFET comprising a source, a drain, a body, first and second gates, and a gate control, said first gate having a gate width that is different from a gate width of said second gate, said first gate being connected to an output terminal of said gate control, said second gate being connected to said output terminal through a switch, said first and second gates being electrically isolated from each other when said switch is open, wherein said body is shorted to said source.
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Accused Products
Abstract
A power MOSFET includes a pair of electrically isolated gates having different gate widths. The MOSFET is connected in a switching mode DC-DC converter, with the gates being driven by a pulse width modulation (PWM) control to vary the duty cycle of the gate drive signal and thereby regulate the output voltage of the DC-DC converter. In light load conditions, the larger gate is disconnected from the PWM control to reduce the gate capacitance which must be driven by the PWM control. In normal load conditions, the larger gate is connected to the PWM control to reduce the on-resistance of the MOSFET. Both of these operations increase the efficiency of the DC-DC converter.
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Citations
19 Claims
- 1. A multiple gated MOSFET comprising a source, a drain, a body, first and second gates, and a gate control, said first gate having a gate width that is different from a gate width of said second gate, said first gate being connected to an output terminal of said gate control, said second gate being connected to said output terminal through a switch, said first and second gates being electrically isolated from each other when said switch is open, wherein said body is shorted to said source.
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10. A synchronous buck converter comprising an N-channel MOSFET and a P-channel MOSFET connected in series to a voltage supply, a gate control unit for driving a gate of each said MOSFETS, and an inductor connected to a midpoint between said N-channel and P-channel MOSFETs, wherein at least one of said MOSFETs comprises:
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a source, a drain, a body, said gate being divided into first and second portions, said first portion having a gate width that is smaller than a gate width of said second portion, said first portion being connected to an output terminal of said gate control unit, said second portion being connected to said output terminal through a switch, said first and second portions being electrically isolated from each other when said switch is open. - View Dependent Claims (11, 12)
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13. A synchronous buck converter comprising a first N-channel MOSFET and a second N-channel MOSFET connected in series to a voltage supply, a gate control unit for driving a gate of each said MOSFETs, and an inductor connected to a midpoint between said first and second N-channel MOSFETs, wherein at least one of said MOSFETs comprises:
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a source, a drain, a body, said gate being divided into first and second portions, said first portion having a width that is smaller than a width of said second portion, said first portion being connected to an output terminal of said gate control unit, said second portion being connected to said output terminal through a first switch, said first and second portions being electrically isolated from each other when said first switch is open. - View Dependent Claims (14)
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15. A method of reducing the power loss in a MOSFET as said MOSFET is turned repeatedly off and on, said method comprising the steps of:
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fabricating a gate of said MOSFET such that said gate comprises a large portion and a small portion; detecting an operating condition at one of the source and drain terminals of said MOSFET; providing a gate drive signal to each of said large and small portions of said gate when said operating condition is in a first state; and providing said gate drive signal to only said small portion of said gate when said operating condition is in a second state. - View Dependent Claims (16, 17, 18, 19)
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Specification