Capacitor on ultrathin semiconductor on insulator
First Claim
Patent Images
1. An integrated circuit capacitor comprising:
- an insulating substrate;
a layer of silicon formed on said insulating substrate;
a MOSFET structure including a channel, a source which includes a lightly doped source region adjacent to the channel, and a drain which includes a lightly doped drain region adjacent to the channel which are formed in said silicon layer and including a gate which overlays an oxide layer adjacent to said channel; and
a conductor interconnecting the source and drain so as to maintain them at a common potential;
wherein the channel is fully depleted for a gate bias voltage that has not surpassed a threshold voltage of the MOSFET structure.
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Abstract
An integrated circuit is provided which comprises: an insulating substrate; a semiconductor layer formed on the insulating substrate; a MOSFET including a source, drain and channel formed in the silicon layer and a gate adjacent to the channel; a gate terminal; and a conductor interconnecting the source and drain so as to maintain them at a common potential.
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Citations
28 Claims
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1. An integrated circuit capacitor comprising:
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an insulating substrate; a layer of silicon formed on said insulating substrate; a MOSFET structure including a channel, a source which includes a lightly doped source region adjacent to the channel, and a drain which includes a lightly doped drain region adjacent to the channel which are formed in said silicon layer and including a gate which overlays an oxide layer adjacent to said channel; and a conductor interconnecting the source and drain so as to maintain them at a common potential; wherein the channel is fully depleted for a gate bias voltage that has not surpassed a threshold voltage of the MOSFET structure. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. An integrated circuit capacitor comprising:
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an insulating substrate; a layer of silicon formed on said insulating substrate; a MOSFET structure including a channel, a source which includes a lightly doped source region adjacent to the channel, and a drain which includes a lightly doped drain region adjacent to the channel which are formed in said silicon layer and including a gate which overlays an oxide layer adjacent to said channel; and a conductor interconnecting the source and drain so as to maintain them at a common potential; wherein the MOSFET structure is an n-type device structure in which the channel is fully depleted for a negative gate bias voltage below a threshold voltage of the MOSFET structure. - View Dependent Claims (28)
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12. An integrated circuit capacitor comprising:
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an insulating substrate; a layer of silicon formed on said insulating substrate; a MOSFET structure including a channel, a source which includes a lightly doped source region adjacent to the channel, and a drain which includes a lightly doped drain region adjacent to the channel which are formed in said silicon layer and including a gate which overlays an oxide layer adjacent to said channel; and a conductor interconnecting the source and drain so as to maintain them at a common potential; wherein the MOSFET structure is a p-type devce structure in which the channel is fully depleted for a negative gate bias voltage above a threshold voltage of the MOSFET structure.
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13. An integrated circuit capacitor comprising:
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an insulating substrate; a layer of silicon formed on said insulating substrate; a capacitor structure which includes a first portion of the silicon layer doped with an impurity of a first type and which includes a second portion of the silicon layer which includes opposed sides doped with an impurity of a second type with the first portion disposed therebetween, and wherein said second portion includes opposed more lightly doped regions closer to the first portion and includes opposed more heavily doped regions farther from the first portion; and a first electrical contact to the first portion; and a second electrical contact to the second portion; wherein the first portion is fully depleted for a voltage applied to the first portion which has not surpassed a threshold voltge beyond which capitance of the capacitor structure sharply transitions. - View Dependent Claims (17, 18, 21, 22, 23, 24, 25, 26, 27)
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14. An integrated circuit capacitor comprising:
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an insulating substrate; a layer of silicon formed on said insulating substrate; a capacitor structure which includes a first portion of the silicon layer doped with an impurity of a first type and which includes a second portion of the silicon layer which includes opposed sides doped with an impurity of a second type with the first portion disposed therebetween, and wherein said second portion includes opposed more lightly doped regions closer to the first portion and includes opposed more heavily doped regions farther from the first portion; and a first electrical contact to the first portion; and a second electrical contact to the second portion; wherein the first impurity is n-type and the second impurity is p-type and the silicon layer is thin enough to become fully depleted upon application of a voltage to the first contact which is below the threshold voltage of the capacitor structure. - View Dependent Claims (16)
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15. An integrated circuit capacitor comprising:
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an insulating substrate; a layer of silicon formed on said insulating substrate; a capacitor structure which includes a first portion of the silicon layer doped with an impurity of a first type and which includes a second portion of the silicon layer which includes opposed sides doped with an impurity of a second type with the first portion disposed therebetween, and wherein said second portion includes opposed more lightly doped regions closer to the first portion and includes opposed more heavily doped regions farther from the first portion; and a first electrical contact to the first portion; and a second electrical contact to the second portion; wherein the first impurity is p-type and the second impurity is n-type and the silicon layer is thin enough to become fully depleted upon application of a voltage to the first contact which is above threshold voltage of the capacitor structure.
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19. An integrated circuit capacitor comprising:
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an insulating substrate; a layer of silicon formed on said insulating substrate; a MOSFET structure including, a channel, a source adjacent to the channel, and a drain adjacent to the channel, which are formed in said silicon layer and including a gate which overlays the channel; and a conductor interconnecting the source and drain so as to maintain them at a common potential; wherein the channel is fully depleted for a gate bias voltage that has not surpassed a threshold voltage of the MOSFET structure.
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20. An integrated circuit capacitor comprising:
an insulating substrate; a layer of silicon formed on said insulating substrate; a capacitor structure which includes a first portion of the silicon layer doped with an impurity of a first type and which includes a second portion of the silicon layer which includes opposed sides doped with an impurity of a second type with the first portion disposed therebetween; and a first electrical contact to the first portion; and a second electrical contact to the second portion; wherein the first portion is filly depleted for a voltage applied to the first portion which has not surpassed a threshold voltge beyond which capitance of the capacitor structure gharply transitions.
Specification