Transmitter for high frequency signals

• US 5,973,559 A
• Filed: 05/11/1998
• Issued: 10/26/1999
• Est. Priority Date: 07/14/1997
• Status: Expired due to Fees

• Current Assignee: Marconi Communications GmbH
• Original Assignee: Robert Bosch GmbH
• Inventors: Alberty, Michael
• Primary Examiner(s): Pascal, Robert
• Assistant Examiner(s): NGUYEN, KHANH V
• Application Number:
  US09/075,606
• Time in Patent Office: 533 Days
• Field of Search: 330/124 R, 330/53, 330/84, 330/107, 330/51, 330/295, 455/69, 455/126, 455/304
• US Class Current: 330/124.00R
• CPC Class Codes: H04L 27/368 adaptive predistortion

Abstract

The transmitter is built according to the LINC principle and has two parallel signal branches, each of which includes an amplifier (V1, V2) and a phase modulator (PM1, PM2). A dividing network (WE) is provided which divides the received signal (DI) between both signal branches and a combining device (KB) which adds the output signals (S11, S22) of both signal branches to form a sum signal (SS). In order to control the phase error in both signal branches the dividing network (WE) is designed so that the assignment of the received signal components (S1, S2) in both signal branches is periodically exchanged at a predetermined cycle frequency (fc). The amplitude modulation of the sum signal (SS) generated by the cyclic exchange of the input signal components (S1,S2) is detected and the phase depending on it in at least one of the signal branches is changed so that amplitude modulation is minimized.

Claims

1. A transmitter for high frequency signals, said transmitter comprising

two parallel signal branches, each including a phase modulator (PM1, PM2) and an amplifier (V1, V2);

a dividing network (WE) including means for dividing a received signal into received signal components (S1, S2) fed to the respective signal branches to form output signals (S11, S22) and means for periodically exchanging an assignment of said signal components (S1, S2) to the respective parallel signal branches at a predetermined cycle frequency (fc);

a combining device (KB) for combining the output signals (S11, S22) from both of said two parallel signal branches into a sum signal (SS); and

means (HD, PS) for detecting amplitude modulation of the sum signal (SS) generated by periodic exchange of said signal components (S1, S2) and for changing a phase of said signal components in at least one of the signal branches according to the amplitude modulation so as to minimize said amplitude modulation.

2. The transmitter as defined in claim 1, wherein the means (HD, PS) for detecting the amplitude modulation and for changing the phase relationship comprises an envelope curve detector (HD) that is supplied a part of said sum signal (SS) and a controllable phase shifter (PS) in one of the signal branches.

3. The transmitter as defined in claim 1, further comprising means for forming a control signal (ST) for said phase in one of the signal branches by multiplicative coupling of the amplitude modulation signal (HS) and the cycle frequency (fc).

4. The transmitter as defined in claim 1, further comprising detector means (D2, D3) for amplitudes of both of said output signals (S11, S22) in both of the signal branches and means (DV, DG) for controlling an amplitude difference between said amplitudes of said output signals.

5. The transmitter as defined in claim 4, wherein the means for controlling the amplitude difference comprises a controllable damping member (DG) arranged in at least one of said signal branches.

6. The transmitter as defined in claim 4, wherein the means for controlling the amplitude difference comprises means for adjusting a direct current operation point of one of said amplifiers (V1, V2).

7. The transmitter as defined in claim 1, wherein both of said amplifiers (V1, V2) are integrated together in a single chip.