Method and apparatus for synchronizing video and graphics data in a multimedia display system including a shared frame buffer

• US 5,977,989 A
• Filed: 09/02/1997
• Issued: 11/02/1999
• Est. Priority Date: 05/24/1995
• Status: Expired due to Term

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Rumph, Darryl Jonathan, Lee, William Robert
• Primary Examiner(s): Bayerl, Raymond J.
• Assistant Examiner(s): Nguyen, Cao H.
• Application Number:
  US08/922,000
• Time in Patent Office: 791 Days
• Field of Search: 345/503, 345/501, 345/521, 345/522, 345/509, 345/519, 345/113, 345/114, 345/302, 345/213, 345/339, 345/332, 345/333
• US Class Current: 345/546
• CPC Class Codes: G09G 2340/125 wherein one of the images is motion video
• CPC Class Codes: G09G 5/12 Synchronisation between the display unit and other units, e.g. other display units, video-disc players
• CPC Class Codes: H04N 5/073 for mutually locking plural sources of synchronising signals, e.g. studios or relay stations
• CPC Class Codes: H04N 9/641 Multi-purpose receivers, e.g. for auxiliary information H04N9/642 takes precedence
• CPC Class Codes: Y10S 715/972 Inserted real-time video in operator interface

Abstract

A multimedia display system includes a central processing unit, a storage device associated with the central processing unit, a standard interface bus to which the central processing unit and the storage device are connected, a graphics processor connected to the bus for generating graphics data in response to commands from the central processor, a digitizer for converting an analog video signal to digital form and for producing synchronization signals, a video processor for processing the digitized video data to produce pixel representations of the digitized video signal, a shared frame buffer for storing the graphics data generated by the graphics processor and the pixel representations of the video signal, a device for converting the stored digital data to a data stream appropriate for driving a video monitor, and a video monitor for displaying the graphics data and the video information, wherein the video processor generates a programmable variable phase vertical synchronization signal for synchronizing video data and graphics data through a shared frame buffer with the capacity to handle relocatable windows.

Claims

1. A multimedia display system comprising:

a central processing unit;

a data storage device;

a graphics processor for receiving and processing graphics data stored in the storage device under control of the said central processing unit;

a bus for interconnecting the central processing unit, the data storage device and the graphics processor;

a video processor for receiving and processing video data and for generating a programmable variable phase vertical synchronization signal;

circuitry for applying the programmable variable phase vertical synchronization signal to the graphics processor for synchronizing the frames of the graphics and video data;

a frame buffer connected to the video processor and to the graphics processor for receiving and storing a composite data frame from the processors; and

,

a display monitor responsive to the contents of the frame buffer means for displaying the composite video/graphics data.

2. A multimedia display system as set forth in claim 1 in which the video data are in analog form and the video processor includes a digitizer for converting the received analog video data to digital video data.

3. A multimedia display system as set forth in claim 1 in which the video processor includes:

a counter for counting a predetermined number of horizontal lines representative of a phase delay; and

,

a sync pulse generation circuit responsive to a predetermined count of the counter.

4. A method of operating a multimedia display system comprising the steps:

receiving and processing data signals from first and second data sources;

generating a programmable variable phase vertical synchronization signal from the first data source;

applying the generated programmable variable phase vertical synchronization signal to synchronize the data signals from the first and second sources;

storing the processed and synchronized first and second data signals in a frame buffer means; and

,

applying the stored contents of the frame buffer to a display monitor for display.

5. A method of synchronizing a plurality of data sources for display on a video monitor in a data processing system, according to claim 4, wherein said generating step further comprises the steps of:

storing a count representative of a predetermined phase delay between an input synchronization signal and an output synchronization signal;

counting in a counter a number of count signals to said stored count;

generating a synchronization signal output when said counter reaches a predetermined count.

6. A method of synchronizing a plurality of data sources for display on a video monitor in a data processing system, according to claim 5, wherein said counting step counts horizontal synchronization pulses.

7. A method of synchronizing a plurality of data sources for display on a video monitor in a data processing system, according to claim 5, wherein said input and output synchronization signals are vertical synchronization signals.

8. A method of synchronizing a plurality of data sources for display on a video monitor in a data processing system, according to claim 5, wherein said count represents a phase delay between said first data source and said second data source.