Hybrid phase-locked loop employing analog and digital loop filters
First Claim
Patent Images
1. A phase-locked loop comprising:
- a detector;
a digital loop filter coupled to the detector, the digital loop filter including a digital filter and a successive approximation register which is responsive to the digital filter;
a digital-to-analog converter coupled to the digital loop filter;
a variable oscillator coupled to the digital-to-analog converter; and
an analog filter coupled between the detector and the variable oscillator, wherein the analog filter is enabled when the digital filter is disabled.
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Abstract
The invention provides a hybrid phase-locked loop (PLL) containing digital and analog portions for digital and analog adjustments, respectively, of an output signal. The hybrid PLL is simple in design. Off-the-shelf controlled oscillators, such as a current controlled oscillator (CCO) can be used with this hybrid PLL. The digital and the analog portions of the hybrid PLL are separate from the controlled oscillator. The digital portion is for a first adjustment of the frequency of the output signal, such as during a calibration. The analog portion is for fine phase and frequency adjustment of the output signal.
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Citations
20 Claims
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1. A phase-locked loop comprising:
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a detector; a digital loop filter coupled to the detector, the digital loop filter including a digital filter and a successive approximation register which is responsive to the digital filter; a digital-to-analog converter coupled to the digital loop filter; a variable oscillator coupled to the digital-to-analog converter; and an analog filter coupled between the detector and the variable oscillator, wherein the analog filter is enabled when the digital filter is disabled. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method for acquiring phase-lock comprising the steps of:
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coupling a data signal to a detector; coupling an output signal to the detector; comparing the phase of the data signal with the phase of the output signal; generating a comparison signal based on the phase comparison of the data signal and the output signal; providing an analog filter coupled to the detector to receive the comparison signal; providing a digital filter coupled to the detector to receive the comparison signal; transforming the comparison signal into a successive digital approximation signal, wherein the successive approximation signal is maintained at a level which disables the analog filter when the digital filter is enabled; and transforming the comparison signal into a fine adjustment signal. - View Dependent Claims (11, 12, 13, 14)
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15. A program storage device readable by a machine for communicating with a detector for coupling a data signal, tangibly embodying a program of instructions executable by the machine to perform method steps for acquiring phase-lock, said method steps comprising:
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coupling a data signal to a detector; coupling an output signal to the detector; comparing the phase of the data signal with the phase of the output signal; generating a comparison signal based on the phase comparison of the data signal and the output signal; coupling an analog filter to the detector to receive the comparison signal; coupling a digital filter to the detector to receive the comparison signal; transforming the comparison signal into a successive digital approximation signal, wherein the successive approximation signal is maintained at a level which disables the analog filter when the digital filter is enabled; and transforming the comparison signal into a fine adjustment signal.
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16. An apparatus for acquiring phase-lock comprising:
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means for coupling a data signal to a detector; means for coupling an output signal to the detector; means for comparing the phase of the data signal with the phase of the output signal; means for generating a comparison signal based on the phase comparison of the data signal and the output signal; an analog filter means coupled to the detector for filtering the comparison signal; a digital filter means coupled to the detector for filtering the comparison signal; means for transforming the comparison signal into a successive digital approximation signal, wherein the successive approximation signal is maintained at a level which disables the analog filter means when the digital filter means is enabled; and means for transforming the comparison signal into a fine adjustment signal. - View Dependent Claims (17)
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18. A phase-locked loop comprising:
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a phase-frequency detector; a digital loop filter coupled to the phase-frequency detector including a digital filter and a successive approximation register, the successive approximation register being responsive to the digital filter; a digital-to-analog converter coupled to the digital loop filter; a variable oscillator coupled to the digital-to-analog converter, wherein the digital filter commands the successive approximation register to produce a successive digital approximation signal for controlling the variable oscillator; and an analog filter coupled to the phase-frequency detector and to the variable oscillator, wherein the analog filter is enabled when the digital filter is disabled. - View Dependent Claims (19)
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20. A method for acquiring phase-lock comprising the steps of:
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coupling a data signal to a detector; coupling an output signal to the detector; comparing the phase of the data signal with the phase of the output signal; generating a comparison signal based on the phase comparison of the data signal and the output signal; analog filtering the comparison signal with an analog filter; digitally filtering the comparison signal with a digital filter; transforming the digitally filtered comparison signal into a successive digital approximation signal, wherein the successive approximation signal is maintained at a level that disables the analog filter when the digital filter is enabled; and transforming the comparison signal into a fine adjustment signal, wherein each of the successive digital approximation signal and the fine adjustment signal control a variable oscillator for producing the output signal.
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Specification