Programmable logic controller computer system with micro field processor and programmable bus interface unit

• US 5,978,593 A
• Filed: 09/05/1996
• Issued: 11/02/1999
• Est. Priority Date: 09/05/1996
• Status: Expired due to Term

• Current Assignee: GE Fanuc Automation North America Incorporated
• Original Assignee: GE Fanuc Automation North America Incorporated
• Inventors: Sexton, Daniel White
• Primary Examiner(s): Beausoliel, Jr., Robert W.
• Assistant Examiner(s): BADERMAN, SCOTT T
• Application Number:
  US08/711,370
• Time in Patent Office: 1,153 Days
• Field of Search: 395/821, 395/835, 395/282, 395/280, 395/822, 395/832, 395/843, 364/238.3
• US Class Current: 710/1
• CPC Class Codes: G05B 19/052 Linking several PLC's
• CPC Class Codes: G05B 19/054 Input/output

Abstract

A programmable logic controller computer system is provided which achieves great flexibility in communication among the components of the system. The computer system includes a host programmable logic controller coupled by a field bus to a programmable bus interface unit. The programmable bus interface unit is located at a field station which includes a main bus to which a micro field processor and a plurality of I/O modules are coupled. The micro field processor is capable of locally processing I/O data from the I/O modules without involving the host PLC. A hand-held programmer is coupled to the programmable bus interface unit to permit the user to program an I/O map into the bus interface unit. The I/O map specifies mapping among the I/O modules, the micro field processor and the host programmable logic controllers. In this manner, communication among the I/O modules, the micro field processor and the host programmable logic controller is flexibly specified and controlled. Moreover, field bus traffic from the I/O modules back to the host programmable logic controller is significantly reduced.

Claims

1. A programmable logic controller computer system comprising:

a host programmable logic controller;

a field bus coupled to the host programmable logic controller;

a main bus;

a plurality of I/O ports coupled to the main bus;

a field programmable logic controller coupled to the main bus; and

a programmable bus interface unit, coupled to the host programmable logic controller via the field bus and further coupled via the main bus to the plurality of I/O ports and the field programmable logic controller, the bus interface unit being programmable to control mapping between the host programmable logic controller, the plurality of I/O ports and the field programmable logic controller, and having means for mapping a selected one of the plurality of I/O ports to another one of the plurality of I/O ports.

2. The programmable logic controller computer system of claim 1 further comprising

a programming unit, coupled to the programmable bus interface unit, for programming the programmable bus interface unit to set the mapping between the host programmable logic controller, the plurality of I/O ports and the field programmable logic controller.

3. The programmable logic controller computer system of claim 1 wherein the programmable bus interface unit includes means for mapping the host programmable logic controller to the field programmable logic controller.

4. The programmable logic controller computer system of claim 1 wherein the programmable bus interface unit includes means for mapping the host programmable logic controller to selected I/O ports.

5. The programmable logic controller computer system of claim 1 wherein the programmable bus interface unit includes means for mapping the field programmable logic controller to the host programmable logic controller.

6. The programmable logic controller computer system of claim 1 wherein the programmable bus interface unit includes means for mapping the field programmable logic controller to selected I/O ports.

7. The programmable logic controller computer system of claim 1 wherein the programmable bus interface unit includes means for mapping selected I/O ports to the host programmable logic controller.

8. The programmable logic controller computer system of claim 1 wherein the programmable bus interface unit includes means for mapping selected I/O ports to the field programmable logic controller.

9. The programmable logic controller computer system of claim 1 further comprising a plurality of I/O terminal blocks coupled to the main bus.

10. The programmable logic controller computer system of claim 1 further comprising respective I/O modules coupled to respective I/O terminal blocks, the I/O modules including the I/O ports, respectively.

11. The programmable logic controller computer system of claim 1 wherein the programmable bus interface unit comprises:

a processor;

a field bus interface coupling the processor to the field bus;

a random access memory coupled to the processor;

a read only memory coupled to the processor; and

a non volatile memory coupled to the processor for an I/O map representing the mapping between the host programmable logic controller, the plurality of I/O ports and the field programmable logic controller.

12. The programmable logic controller computer system of claim 1 wherein the field programmable logic controller includes a processor for processing I/O information locally without involvement of the host programmable logic controller.

13. In a programmable logic controller computer system including a host programmable logic controller, a field bus being coupled to the host programmable logic controller, a programmable bus interface unit coupled between the field bus and a main bus including a plurality of I/O ports, a field programmable logic controller being coupled to the main bus, a method of operating the system comprising the steps of:

initializing the programmable logic controller computer system;

mapping, in the programmable bus interface unit, between the host programmable logic controller, the I/O ports and the field programmable logic controller;

providing mapping information to the bus interface unit, the mapping information indicating mapping between the host programmable logic controller, the I/O ports and the field programmable logic controller, the mapping information further indicating mapping from a selected I/O port to another I/O port; and

processing information from the I/O ports locally by the field programmable logic controller.

14. The method of claim 13 further comprising the step of storing the mapping information in the programmable bus interface unit.

15. The method of claim 13 further comprising the step of the programmable bus interface unit processing I/O information and routing I/O information according to the mapping information stored in the programmable bus interface unit.

16. The method of claim 13 further comprising the step of providing the mapping information to the programmable bus interface unit via a user operated hand-held programmer input device.

17. The method of claim 13 wherein the step of providing mapping information includes providing mapping information which maps the host programmable logic controller to the field programmable logic controller.

18. The method of claim 13 wherein the step of providing mapping information includes providing mapping information which maps the host programmable logic controller to selected I/O ports.

19. The method of claim 13 wherein the step of providing mapping information includes providing mapping information which maps the field programmable logic controller to the host programmable logic controller.

20. The method of claim 13 wherein the step of providing mapping information includes providing mapping information which maps the field programmable logic controller to selected I/O ports.

21. The method of claim 13 wherein the step of providing mapping information includes providing mapping information which maps selected I/O ports to the host programmable logic controller.

22. The method of claim 13 wherein the step of providing mapping information includes providing mapping information which maps selected I/O ports to the field programmable logic controller.