Signal processing scheme utilizing oversampled switched capacitor filter
First Claim
1. A signal processing system comprising:
- a digital to analog converter which is clocked at a first frequency;
a switched capacitor filter which receives input from the digital to analog converter and outputs a filtered signal, wherein the switched capacitor filter is clocked at a second frequency which is a multiple N times the first frequency, wherein N is greater than one; and
an analog signal synchronization circuit which facilitates sampling of an output signal from the digital to analog converter at the second frequency, thereby allowing the switched capacitor filter to oversample said output signal from the digital to analog converter.
7 Assignments
0 Petitions
Accused Products
Abstract
A novel signal processing scheme comprises a digital to analog converter which is clocked at a first frequency, and a switched capacitor filter which receives input from the digital to analog converter and is clocked at a second frequency which is a multiple N times the first frequency. A preferred version of the present invention further comprises an analog signal sychronization circuit which allows the switched capacitor filter to oversample output from the digital to analog converter. The analog signal sychronization circuit comprises a sample and hold circuit, which receives input from the digital to analog converter and holds the input so that the switched capacitor filter can sample the same input N times, and a digital clock generator, which clocks the sample and hold circuit such that the sample and hold circuit only samples settled and valid output data from the digital to analog converter. An RC active filter receives input from the switched capacitor filter and rejects signal images at the first and higher frequencies.
65 Citations
18 Claims
-
1. A signal processing system comprising:
-
a digital to analog converter which is clocked at a first frequency; a switched capacitor filter which receives input from the digital to analog converter and outputs a filtered signal, wherein the switched capacitor filter is clocked at a second frequency which is a multiple N times the first frequency, wherein N is greater than one; and an analog signal synchronization circuit which facilitates sampling of an output signal from the digital to analog converter at the second frequency, thereby allowing the switched capacitor filter to oversample said output signal from the digital to analog converter. - View Dependent Claims (2, 3, 4, 5, 6, 7)
-
-
8. A signal processing system comprising:
-
a digital to analog converter which is clocked at a first frequency; a switched capacitor filter which receives input from the digital to analog converter and outputs a filtered signal, wherein the switched capacitor filter is clocked at a second frequency which is a multiple N times the first frequency, wherein N is greater than one; and an analog signal synchronization circuit connected between the digital to analog converter and the switched capacitor filter, which samples an output signal from the digital to analog converter at the second frequency, thereby allowing the switched capacitor filter to oversample said output signal from the digital to analog converter, wherein the analog signal synchronization circuit comprises; a sample and hold circuit which receives said output signal from the digital to analog converter and holds said output signal so that the switched capacitor filter can oversample the output signal N times, and a digital clock generator, which clocks the sample and hold circuit such that the sample and hold circuit samples said output signal from the digital to analog converter. - View Dependent Claims (9, 10, 11)
-
-
12. A method for use in signal processing, comprising the steps of:
-
clocking a digital to analog converter at a first frequency; clocking a switched capacitor filter, which receives input from the digital to analog converter and outputs a filtered signal, at a second frequency which is a multiple N times the first frequency, wherein N is greater than one; and utilizing an analog signal synchronization circuit which facilitates sampling of an output signal from the digital to analog converter at the second frequency, thereby allowing the switched capacitor filter to oversample said output signal from the digital to analog converter. - View Dependent Claims (13, 14, 15, 16, 17, 18)
-
Specification