Digital clock recovery loop
First Claim
1. A clock recovery circuit configured as a phase lock loop to extract a clock signal from an input digital signal, the clock recovery circuit comprising:
- a voltage controlled oscillator having a control node and having an output configured to produce an output wave having a frequency that varies in response to a voltage applied to the control node;
charge pump and loop filter circuitry configured to control the rate of change of the voltage on the control node of the voltage controlled oscillator;
a start-up circuit configured to perform frequency discrimination and, in conjunction with the charge pump and loop filter circuitry, adjust the voltage on the control node of the voltage controlled oscillator; and
a state machine configured to perform phase control and adjust the voltage on the control node of the voltage controlled oscillator.
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Accused Products
Abstract
A communications system including a clock recovery circuit that extracts a clock signal from incoming digital data, the clock recovery circuit comprising:
a voltage controlled oscillator having a control node and having an output producing an output wave having a frequency that varies in response to a voltage applied to the control node; charge pump and loop filter circuitry that controls the rate of change of the voltage on the control node of the voltage controlled oscillator; a start-up circuit that performs frequency detection and, in conjunction with the charge pump and loop filter circuitry, adjusts the voltage on the control node of the voltage controlled oscillator; and a state machine that performs phase detection and adjusts the voltage on the control node of the voltage controlled oscillator.
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Citations
18 Claims
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1. A clock recovery circuit configured as a phase lock loop to extract a clock signal from an input digital signal, the clock recovery circuit comprising:
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a voltage controlled oscillator having a control node and having an output configured to produce an output wave having a frequency that varies in response to a voltage applied to the control node; charge pump and loop filter circuitry configured to control the rate of change of the voltage on the control node of the voltage controlled oscillator; a start-up circuit configured to perform frequency discrimination and, in conjunction with the charge pump and loop filter circuitry, adjust the voltage on the control node of the voltage controlled oscillator; and a state machine configured to perform phase control and adjust the voltage on the control node of the voltage controlled oscillator. - View Dependent Claims (2, 3, 4, 5, 6)
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- 7. A phase lock loop configured to receive an oscillating input signal and produce an output signal, the phase lock loop comprising a plurality of flip-flops which are chained together, the plurality of flip-flops including a first flip-flop having a first output, including a second flip-flop having an input coupled to the first output and having a second output, and including a third flip-flop having an input coupled to the second output, the flip-flops being configured to be used to determine time spacing between transitions to perform a frequency comparison of the output signal relative to the input signal, wherein the input signal is digital and the phase locked loop extracts a clock from the digital signal, the phase locked loop further comprising a control node, and circuitry configured to perform phase control and adjust the voltage on the control node of the voltage controlled oscillator.
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9. A phase lock loop configured to receive an oscillating input signal and produce an output signal, the phase lock loop comprising a plurality of flip-flops which are chained together and used to determine time spacing between transitions to perform a frequency comparison of the output signal relative to the input signal, wherein the input signal is digital and the phase lock loop extracts a clock from the digital input signal, the phase lock loop further comprising a control node, and circuitry configured to perform phase control and adjust the voltage on the control node of the voltage controlled oscillator, the phase lock loop further comprising bias circuitry configured to apply an offset voltage to the voltage controlled oscillator such that, in the absence of any voltage applied to the control node, the frequency of the output wave produced by the voltage controlled oscillator is at least half and not greater than the final frequency of the voltage controlled oscillator when frequency lock is established.
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10. A communications system including a clock recovery circuit configured as a phase lock loop for extracting a clock signal from incoming digital data, the clock recovery circuit comprising:
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a voltage controlled oscillator having a control node and having an output configured to produce an output wave having a frequency that varies in response to a voltage applied to the control node; charge pump and loop filter circuitry configured to control the rate of change of the voltage on the control node of the voltage controlled oscillator; a start-up circuit configured to perform frequency discrimination and, in conjunction with the charge pump and loop filter circuitry, adjust the voltage on the control node of the voltage controlled oscillator; and circuitry configured to perform phase control and adjust the voltage on the control node of the voltage controlled oscillator. - View Dependent Claims (11)
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12. A communications system including a clock recovery circuit configured as a phase lock loop for extracting a clock signal from incoming digital data, the clock recovery circuit comprising:
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a voltage controlled oscillator means having a control node and having an output, for producing a wave at the output having a frequency that varies in response to a voltage applied to the control node; charge pump and loop filter means for controlling the rate of change of the voltage on the control node of the voltage controlled oscillator; start-up circuit means for performing frequency discrimination and, in conjunction with the charge pump and loop filter circuitry, for adjusting the voltage on the control node of the voltage controlled oscillator; and state machine means for performing phase control and for adjusting the voltage on the control node of the voltage controlled oscillator. - View Dependent Claims (13, 14, 15, 16, 17, 18)
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Specification