Drive circuit for color display device
First Claim
1. A drive circuit for a color display device comprising a plurality of pixels which are wired in matrix through a plurality of data signal lines and a plurality of scanning signal lines, said drive circuit comprising:
- an input means for sampling three-primary color image signals for one line which are inputted through three input lines during a given period t, to write the signals in a memory; and
an output means for reading the three-primary color image signals sequentially from the memory during a certain t/2 period to output the signals to three output lines, and reading the three-primary color image signals sequentially from the memory during an additional t/2 period different from the certain t/2 period to output the signals to the three output lines,wherein said certain t/2 period overlaps with said period t, and wherein said output means outputs the three-primary color image signals to the three output lines using different line memories between said certain t/2 period and said additional t/2 period.
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Abstract
A drive circuit for a color display device comprising a plurality of pixels which are wired in matrix through a plurality of data signal lines and a plurality of scanning signal lines; the drive circuit comprising an input means for sampling three-primary color image signals for one line which are inputted through three input lines during a given period t, to write the signals in a memory, and an output means for reading the three-primary color image signals during a certain t/2 period to output the signals to three output lines, and reading the three-primary color image signals during an additional t/2 period different from the certain t/2 period to output the signals to the three output lines. When the drive circuit is used in, e.g., an active matrix liquid-crystal display device, display can be free of flicker and can be in a high resolution.
57 Citations
15 Claims
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1. A drive circuit for a color display device comprising a plurality of pixels which are wired in matrix through a plurality of data signal lines and a plurality of scanning signal lines, said drive circuit comprising:
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an input means for sampling three-primary color image signals for one line which are inputted through three input lines during a given period t, to write the signals in a memory; and an output means for reading the three-primary color image signals sequentially from the memory during a certain t/2 period to output the signals to three output lines, and reading the three-primary color image signals sequentially from the memory during an additional t/2 period different from the certain t/2 period to output the signals to the three output lines, wherein said certain t/2 period overlaps with said period t, and wherein said output means outputs the three-primary color image signals to the three output lines using different line memories between said certain t/2 period and said additional t/2 period. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A drive circuit for a color display device comprising a plurality of pixels which are wired in matrix through a plurality of data signal lines and a plurality of scanning signal lines, said drive circuit comprising:
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an input means for sampling three-primary color image signals for one line which are inputted through three input lines during a given period t, to write the signals in a memory; and an output means for reading the three-primary color image signals sequentially from the memory during a certain t/2 period to output the signals to three output lines, and reading the three-primary color image signals sequentially from the memory during an additional t/2 period different from the certain t/2 period to output the signals to the three output lines, wherein said certain t/2 period overlaps with said period t, so as to effect micro-adjustment of the timing of reading from said memory, matchingly to pixel arrangement of said color display device, said micro-adjustment corresponding to a phase difference between a phase of charging a capacitance associated with the display and a phase of period per one pixel of the signals inputted by said input means.
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15. A drive circuit for a color display device comprising a plurality of pixels which are wired in matrix through a plurality of data signal lines and a plurality of scanning signal lines, said drive circuit comprising:
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an input means for sampling three-primary color image signals for one line which are inputted through three input lines during a given period t, to write the signals in a memory; and an output means for reading the three-primary color image signals sequentially from the memory during a certain t/2 period to output the signals to three output lines, and reading the three-primary color image signals sequentially from the memory during an additional t/2 period different from the certain t/2 period to output the signals to the three output lines, wherein said certain t/2 period overlaps with said period t, and wherein image signals on an n-th line of the odd-numbered field are written in a 2n+1 line and 2n+2 line of said plurality of pixels, and image signals on the n-th line of the even-numbered field are written in the pixels on a 2n line and the 2n+1 line.
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Specification