Circuit interrupter with test actuator for ground fault and arc fault test mechanisms

• US 5,982,593 A
• Filed: 05/12/1998
• Issued: 11/09/1999
• Est. Priority Date: 05/12/1998
• Status: Expired due to Term

• Current Assignee: Eaton Corp. (Wisconsin) (Eaton Corporation PLC.)
• Original Assignee: Eaton Corp. (Wisconsin) (Eaton Corporation PLC.)
• Inventors: Kimblin, Clive W., Elms, Robert T.
• Primary Examiner(s): SHERRY, MICHAEL JUDE
• Application Number:
  US09/076,394
• Time in Patent Office: 546 Days
• Field of Search: 361/42, 361/45, 361/93, 361/102, 361/115, 335/18, 335/21, 335/35, 324/424
• US Class Current: 361/42
• CPC Class Codes: H02H 1/0015 Using arc detectors
• CPC Class Codes: H02H 3/335 the main function being self testing of the device

Abstract

A miniature circuit breaker incorporating ground fault protection and arc fault protection includes a test mechanism including a ground fault test circuit for testing a ground fault detector trip mechanism, and an arc fault test circuit for testing an arc fault detector trip mechanism. A state machine circuit automatically controls the test mechanism to sequentially test both of the ground fault and arc fault detector trip mechanisms. A test push button is interconnected with the state machine circuit and, when pressed, initiates sequential testing of both of the ground fault and arc fault trip mechanisms.

Claims

1. A circuit interrupter comprising:

a housing;

separable contacts mounted in said housing;

an operating mechanism for opening said separable contacts when actuated;

trip means for actuating said operating mechanism in response to predetermined current conditions, said trip means including ground fault trip means for actuating said operating mechanism in response to a ground fault, and arc fault trip means for actuating said operating mechanism in response to an arc fault;

test means including ground fault test means for testing said ground fault trip means, and arc fault test means for testing said arc fault trip means;

means for automatically controlling said test means to test both of said ground fault trip means and said arc fault trip means; and

a test actuator in communication with said means for automatically controlling said test means to initiate testing of both of said ground fault trip means and said arc fault trip means.

2. The circuit interrupter of claim 1 wherein said means for automatically controlling said test means includes means for actuating said trip means only if both of said ground fault test means and said arc fault test means successfully test said ground fault trip means and said arc fault trip means, respectively.

3. The circuit interrupter of claim 1 wherein said means for automatically controlling said test means includes means for sequencing said ground fault test means and means for sequencing said arc fault test means.

4. The circuit interrupter of claim 1 wherein said ground fault trip means includes ground fault sensing means for sensing a ground fault current condition;

wherein said ground fault test means includes means for simulating the ground fault current condition;

wherein said arc fault trip means includes arc fault sensing means for sensing an arc fault current condition; and

wherein said arc fault test means includes means for simulating the arc fault current condition.

5. The circuit interrupter of claim 4 wherein said means for automatically controlling said test means includes means for sequencing said means for simulating the ground fault current condition and said means for simulating the arc fault current condition.

6. The circuit interrupter of claim 5 wherein said means for sequencing first sequences said means for simulating the ground fault current condition and then sequences said means for simulating the arc fault current condition.

7. The circuit interrupter of claim 1 wherein said ground fault trip means includes an output having a value which represents successful testing of said ground fault trip means by said ground fault test means;

wherein said arc fault trip means includes an output having a value which represents successful testing of said arc fault trip means by said arc fault test means; and

wherein said means for automatically controlling said test means includes input means connected to the outputs of said ground fault trip means and said arc fault trip means, and means for enabling said trip means to actuate said operating mechanism when both of said ground fault trip means and said arc fault trip means have been successfully tested.

8. The circuit interrupter of claim 7 wherein said means for automatically controlling said test means has a plurality of states including:

a zeroth state in which said test actuator is inactive and said test means is disabled;

a first state which is entered when said test actuator is active, and in which said trip means is disabled and one of said ground fault test means and said arc fault test means is enabled; and

another state in which the other of said ground fault test means and said arc fault test means is enabled, and in which said trip means is actuated after both of said ground fault test means and said arc fault test means have successfully tested said ground fault trip means and said arc fault trip means, respectively.

9. The circuit interrupter of claim 8 wherein said one of said ground fault test means and said arc fault test means is said ground fault test means.

10. The circuit interrupter of claim 7 wherein said means for automatically controlling said test means has a plurality of states including:

a zeroth state in which said test actuator is inactive and said test means is disabled;

a first state which is entered from the zeroth state when said test actuator is active, and in which said trip means is disabled and one of said ground fault test means and said arc fault test means is enabled;

a second state which is entered from the first state when said one of said ground fault test means and said arc fault test means unsuccessfully tests said ground fault trip means and said arc fault trip means, respectively;

a third state which is entered from the first state when said one of said ground fault test means and said arc fault test means successfully tests said ground fault trip means and said arc fault trip means, respectively, and which disables said one of said ground fault test means and said arc fault test means;

a fourth state which is entered from the third state, in which the other of said ground fault test means and said arc fault test means is enabled, and in which said trip means is actuated when said other of said ground fault test means and said arc fault test means successfully tests said ground fault trip means and said arc fault trip means, respectively; and

a fifth state which is entered from the fourth state when said other of said ground fault test means and said arc fault test means unsuccessfully tests said ground fault trip means and said arc fault trip means, respectively, and in which said other of said ground fault test means and said arc fault test means is disabled.

11. The circuit interrupter of claim 10 wherein said one of said ground fault test means and said arc fault test means is said ground fault test means.

12. The circuit interrupter of claim 10 wherein the zeroth state is entered following the second state.

13. The circuit interrupter of claim 10 wherein the zeroth state is entered following the fifth state.

14. The circuit interrupter of claim 10 wherein said trip means is enabled in the zeroth state.

15. The circuit interrupter of claim 1 wherein said test actuator has an active state, which initiates testing of both of said ground fault trip means and said arc fault trip means by said means for automatically controlling said test means, and an inactive state;

wherein said ground fault trip means includes an output having a ground fault trip signal which is active in response to the ground fault;

wherein said arc fault trip means has an output having an arc fault trip signal which is active in response to the arc fault; and

wherein said means for automatically controlling said test means includes means for inputting the active state of said test actuator means, means for inputting the ground fault trip signal and the arc fault trip signal from the outputs of said ground fault trip means and said arc fault trip means, respectively, and means for actuating said operating mechanism.

16. The circuit interrupter of claim 1 wherein said test actuator is a push button.

17. The circuit interrupter of claim 1 wherein said circuit interrupter is a circuit breaker.