Microwave monolithic integrated circuit with coplaner waveguide having silicon-on-insulator composite substrate

• US 5,986,331 A
• Filed: 05/30/1996
• Issued: 11/16/1999
• Est. Priority Date: 05/30/1996
• Status: Expired due to Fees

• Current Assignee: Philips Electronics North America Corporation (Koninklijke Philips N.V.)
• Original Assignee: Philips Electronics North America Corporation (Koninklijke Philips N.V.)
• Inventors: Kim, Manjin Jerome, Letavic, Theodore James
• Primary Examiner(s): Abraham, Fetsum
• Application Number:
  US08/655,170
• Time in Patent Office: 1,265 Days
• Field of Search: 257/275, 257/604, 257/624, 257/625, 257/659, 257/728, 257/664, 257/347, 257/501, 333/161, 333/164, 333/333, 333/246, 333/248, 333/239, 333/282, 333/208
• US Class Current: 257/664
• CPC Class Codes: H01L 23/66 High-frequency adaptations
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/3011 Impedance
• CPC Class Codes: H01P 3/003 Coplanar lines

Abstract

A microwave monolithic integrated circuit includes a coplanar waveguide (CPW) formed by a composite silicon structure constituted by a relatively high resistivity substrate, a first oxide layer on the upper surface thereof, a relatively thin silicon layer formed on the surface of the first oxide layer, and a very thin second oxide layer formed on the surface of the thin silicon layer. The silicon layer and the first oxide layer on which it is formed constitutes a silicon-on-insulator or SOI structure. A metallic signal line and ground planes are bonded to the surface of the second oxide layer. The zone of the thin silicon layer which extends between the ground planes is doped with an active impurity to produce high conductivity therein. As a result, the electric component of a quasi-TEM wave traversing the waveguide is substantially restricted to the thin silicon layer and does not penetrate to the underlying bulk silicon substrate. This achieves significantly reduced transmission loss and a quality factor Q in the vicinity of 17 for the CPW. Passive and active circuits may be formed in regions of the thin silicon layer other than those used for the CPW.

Claims

1. A microwave monolithic integrated circuit (MMIC) which includes a coplanar waveguide (CPW) for microwave radio frequency signals, said CPW having a signal conductor and a pair of ground planes spaced therefrom on either side thereof and extending substantially parallel to each other on the upper surface of a composite silicon-on-insulator (SOI) structure;

said SOI structure comprising;

a monocrystalline silicon substrate having an upper surface which is oxidized to provide thereon an insulating layer of silicon dioxide;

a layer of monocrystalline silicon of relatively low conductivity formed on said insulating layer and having an upper surface which is oxidized to provide thereon a thin layer of silicon dioxide which constitutes the upper surface of the SOI structure; and

a diffused zone of relatively high conductivity formed in said silicon layer, said zone laterally extending therein under said signal conductor and up to each of said ground planes;

whereby the electric component of a quasi-TEM microwave radio frequency signal traversing said CPW is bent upward into said silicon layer so as to reduce transmission loss due to penetration of said electric component into the silicon substrate.

2. An MMIC as claimed in claim 1 wherein said diffused zone is of graded conductivity in the lateral direction, being of highest conductivity underlying said signal conductor and of lowest conductivity upon reaching said ground planes.

3. A coplanar microwave radio frequency waveguide (CPW) having a signal conductor and a pair of ground planes spaced therefrom on either side thereof extending substantially parallel to each other on the upper surface of a composite silicon-on-insulator (SOI) structure;

said SOI structure comprising;

a monocrystalline silicon substrate having an upper surface which is oxidized to provide thereon an insulating layer of silicon dioxide;

a layer of monocrystalline silicon of relatively low conductivity formed on said insulating layer and having an upper surface which is oxidized to provide thereon a thin layer of silicon dioxide which constitutes the upper surface of the SOI structure; and

a diffused zone of relatively high conductivity formed in said silicon layer, said zone laterally extending therein under said signal conductor and up to each of said ground planes;

whereby the electric component of a quasi-TEM microwave radio frequency signal traversing said CPW is bent upward into said silicon layer so as to reduce transmission loss due to penetration of said electric component into the silicon substrate.

4. A CPW as claimed in claim 3 wherein said diffused zone is of graded conductivity in the lateral direction, being of highest conductivity underlying said signal conductor and of lowest conductivity upon reaching said ground planes.