Bias concept for intrinsic gain stabilization over temperature

• US 5,986,508 A
• Filed: 08/26/1996
• Issued: 11/16/1999
• Est. Priority Date: 08/26/1996
• Status: Expired due to Fees

• Current Assignee: Larry J. Nevin
• Original Assignee: Larry J. Nevin
• Inventors: Nevin, Larry J.
• Primary Examiner(s): Mullins, James B.
• Application Number:
  US08/703,386
• Time in Patent Office: 1,177 Days
• Field of Search: 330/256, 330/266, 330/272, 330/277, 330/289, 330/290, 330/296
• US Class Current: 330/289
• CPC Class Codes: H03F 1/301 in MOSFET amplifiers H03F1/303, H03F1/305, H03F1/308 take precedence
• CPC Class Codes: H03F 2200/18 the bias of the gate of a FET being controlled by a control signal
• CPC Class Codes: H03F 2200/447 the amplifier being protected to temperature influence

Abstract

An amplifier for systems affected by changes in operating temperature, in which the amplifier gain is stabilized over temperature. A temperature compensating control element is added to the previously known active bias control amplifiers, forming a second control loop. This control acts to modify the device bias current, in a way which holds the device gain constant as temperature varies. In so doing it implements, in the circuit, the mathematically derived current variation which, based on the physics of the device, maintains constant gain. The additional circuitry is very inexpensive, preserving the cost-effectiveness of the integrated circuit bias scheme for those applications requiring the additional bias control.

Claims

1. An amplifier circuit including a GaAs FET device having a drain, a source, and a control gate, and a double-loop active bias circuit for stabilizing the gain of the device, said amplifier circuit comprising:

a first feedback amplifier having a first input connected to the drain, a second input, and having an output connected to the control gate;

a second feedback amplifier having a first input connected to the control gate, a second input connected to a fixed voltage reference source, and an output connected to said second input of said first feedback amplifier; and

the operation being such that the gate voltage fine-tunes a reference voltage applied to said second input of said first feedback amplifier.

2. An amplifier circuit including a GaAs FET device having a drain, a source, and a control gate, and a double-loop active bias circuit for stabilizing the gain of the device, the amplifier circuit comprising:

a first feedback amplifier having a first input connected to the drain, a second input, and having an output connected to the control gate; and

a second feedback amplifier having a first input connected to the control gate, a second input connected to a bias reference setting voltage source, and an output connected to the second input of the first feedback amplifier;

thus applying to the control gate a bias control voltage that is a composite function of the bias reference setting voltage, the drain bias current, and the gate voltage itself.

3. In a system which includes a GaAs FET device capable of producing an output signal in response to an input signal, having a bias current which establishes a quiescent operating condition, a gate voltage controlling the bias current in accordance with a quadratic formula, wherein the gain of the device representing its desired response bears a mathematical relationship to the bias current, and characterized by the fact that temperature variations can independently vary the relationship of the bias current to the gate voltage, a closed-loop control system for maintaining system operation so as to stabilize the gain of the device at a desired response level, comprising:

means responsive to both the drain voltage and the gate voltage for controlling the gate voltage and hence indirectly the bias current to vary the quiescent operating condition so as to preserve an essentially constant value of the gain of the device;

the responsive means including a first closed-loop circuit for controlling gate voltage as a function of the drain voltage, and a second closed-loop circuit responsive to the gate voltage for modifying a reference voltage in said first closed-loop circuit, the second closed-loop circuit also being responsive to a fixed voltage reference that is a function of the quiescent gate control voltage of the device.