Computer system using signal modulation techniques to enhance multimedia device communication
First Claim
1. A computer system comprising:
- a CPU;
a main memory coupled to the CPU which stores data accessible by the CPU;
a chip set logic coupled to the CPU and to the main memory;
an expansion bus coupled to the chip set logic and adapted for transferring data, wherein the expansion bus comprises a plurality of signal lines; and
a plurality of peripheral devices coupled to the expansion bus and configured to transfer data via the expansion bus, wherein each of the plurality of peripheral devices is configured to accommodate data transfers via binary data signals conveyed upon the plurality of signal lines of the expansion bus, and wherein at least a first of the plurality of peripheral devices is configured to generate a data-modulated carrier signal to effectuate a transfer of data to a second of the plurality of peripheral devices, wherein the data-modulated carrier signal is formed by modulating an a.c. carrier waveform in response to binary data, and wherein the data-modulated carrier signal is conveyed simultaneously with at least one of the binary data signals upon at least one of the plurality of signal lines of the expansion bus.
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Accused Products
Abstract
A computer system is presented having various devices capable of exchanging data using either binary data signals or a.c. signals created by carrier waveform modulation. The computer system includes a common bus having a signal bandwidth divided up to form two or more separate communication channels. A first channel has a signal bandwidth extending from 0 Hz to an upper frequency limit ƒH1, and is reserved for binary data signals. The signals associated with two or more data transfers occurring within different communication channels at the same time are superimposed upon one another on the signal lines of the common bus. The signals do not interfere with one another, thus allowing simultaneous communication between devices via different communication channels. The ability to transfer data using conventional binary data signals allows compatibility with existing devices. The various devices may include a video/graphics card, a sound card, a hard disk drive, a CD-ROM drive, and a network interface card. When binary data is transferred from a master device having a modulation interface to a target device, the master device may select a channel from a list of channels the target device is configured to use. The master device generates an output signal consisting of either the binary data, if the selected channel is the first channel, or a data-modulated carrier signal. The master device drives the output signal upon a signal line of the bus. The target device receives the output signal and extracts the binary data from the output signal.
55 Citations
22 Claims
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1. A computer system comprising:
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a CPU; a main memory coupled to the CPU which stores data accessible by the CPU; a chip set logic coupled to the CPU and to the main memory; an expansion bus coupled to the chip set logic and adapted for transferring data, wherein the expansion bus comprises a plurality of signal lines; and a plurality of peripheral devices coupled to the expansion bus and configured to transfer data via the expansion bus, wherein each of the plurality of peripheral devices is configured to accommodate data transfers via binary data signals conveyed upon the plurality of signal lines of the expansion bus, and wherein at least a first of the plurality of peripheral devices is configured to generate a data-modulated carrier signal to effectuate a transfer of data to a second of the plurality of peripheral devices, wherein the data-modulated carrier signal is formed by modulating an a.c. carrier waveform in response to binary data, and wherein the data-modulated carrier signal is conveyed simultaneously with at least one of the binary data signals upon at least one of the plurality of signal lines of the expansion bus. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A computer system comprising:
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a CPU; a main memory coupled to the CPU which stores data accessible by the CPU; a chip set logic coupled to the CPU and to the main memory; an expansion bus coupled to the chip set logic and adapted for transferring data, wherein the expansion bus comprises a plurality of signal lines; and a plurality of peripheral devices coupled to the expansion bus and configured to accommodate data transfers via binary data signals conveyed upon the plurality of signal lines of the expansion bus, wherein each of a subset of the plurality of peripheral devices includes a modulation interface configured to drive a data-modulated carrier signal upon at least one of the signal lines of the expansion bus, and wherein the data-modulated carrier signal is formed by modulating an a.c. carrier waveform in response to binary data, and wherein the data-modulated carrier signal is conveyed simultaneously with at least one of the binary data signals. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
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20. A method of transferring binary data from a master device to a target device, wherein the master device includes a modulation interface configured to transfer data via data-modulated carrier signals, and wherein the master and target devices are coupled to an expansion bus, and wherein the expansion bus comprises a plurality of signal lines and a signal bandwidth, and wherein the signal bandwidth is partitioned to form a plurality of communication channels, and wherein a first communication channel of the plurality of communication channels extends from 0 Hz to an upper frequency limit, the method comprising:
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the master device selecting a communication channel; the master device generating an output signal consisting of;
(i) the binary data if the selected communication channel is the first communication channel, or (ii) a data-modulated carrier signal if the selected communication channel is not the first communication channel, wherein the data-modulated carrier signal is formed by modulating an a.c. carrier waveform in response to the binary data;the master device driving the output signal upon one of the plurality of signal lines of the expansion bus; the target device receiving the output signal; and the target device converting the output signal to the binary data. - View Dependent Claims (21, 22)
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Specification