Attachment or integration of a BIOS device into a computer system using local bus
First Claim
Patent Images
1. A computer comprising:
- a central processing unit;
a mezzanine bus;
a BIOS device that is connected to the mezzanine bus; and
core logic connecting the central processing unit to the mezzanine bus comprising;
a state machine for initiating mezzanine bus cycles in a normal mode; and
logic for bypassing the state machine when a BIOS access is initiated;
wherein the core logic is configured such that if a BIOS access is initiated;
the core logic becomes master of the mezzanine bus;
a mezzanine bus cycle in normal mode is not initiated; and
the core logic places the address of the BIOS device on the mezzanine bus.
7 Assignments
0 Petitions
Accused Products
Abstract
Chipset or a device for attachment of the ROM BIOS within the system architecture. Although normally attached to the ISA bus, the ROM BIOS may be attached to an alternate bus (typically a higher-performance bus) located within the system, thereby potentially eliminating the ISA bus from the computer system.
-
Citations
21 Claims
-
1. A computer comprising:
-
a central processing unit; a mezzanine bus; a BIOS device that is connected to the mezzanine bus; and core logic connecting the central processing unit to the mezzanine bus comprising; a state machine for initiating mezzanine bus cycles in a normal mode; and logic for bypassing the state machine when a BIOS access is initiated; wherein the core logic is configured such that if a BIOS access is initiated; the core logic becomes master of the mezzanine bus; a mezzanine bus cycle in normal mode is not initiated; and the core logic places the address of the BIOS device on the mezzanine bus. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
-
-
12. Core logic that controls BIOS operations in a computer system, wherein the BIOS operations involve a central processing unit and a BIOS device on a mezzanine bus, the core logic comprising:
-
a port for communicating with the central processing unit; a port for connecting to the mezzanine bus; logic for initiating mezzanine bus cycles; logic that bypasses the logic for initiating mezzanine bus cycles when the BIOS device is accessed; logic that ensures that the core logic is the master of the mezzanine bus; logic that presents an address to the BIOS device by placing the address on the mezzanine bus; logic that receives data stored in the BIOS device at the address by sampling a portion of the mezzanine bus; and logic that transfers the data to the central processing unit. - View Dependent Claims (13, 14, 15, 16)
-
-
17. Core logic for controlling BIOS operations in a computer system, where the BIOS operations involve a central processing unit and a BIOS device on a mezzanine bus, the core logic comprising:
-
means for initiating mezzanine bus cycles; means for bypassing the logic for initiating mezzanine bus cycles when the BIOS device is accessed; means for ensuring that the core logic is the master of the mezzanine bus; means for presenting an address to the BIOS device by placing the address on the mezzanine bus; means for receiving data stored in the BIOS device at the address by sampling a portion of the mezzanine bus; and means for transferring the data to the central processing unit. - View Dependent Claims (18, 19, 20, 21)
-
Specification