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Memory apparatus and memory control method

  • US 5,987,573 A
  • Filed: 02/06/1997
  • Issued: 11/16/1999
  • Est. Priority Date: 02/06/1996
  • Status: Expired due to Term
First Claim
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1. A memory apparatus comprising:

  • a semiconductor memory having a memory area divided in a plurality of blocks for selectively storing data and batch-erasing data in units of a block; and

    a control section connected to a host computer for controlling a read/write operation in accordance with a command therefrom and having a table memory which has a plurality of memory positions in one-to-one correspondence with the blocks of the semiconductor memory, and stores data indicating absence of data in a memory position thereof which corresponds to one of the blocks in which no data is stored,wherein the control section includes means for designating the memory positions of the table memory by means of addresses allocated to the blocks of the semiconductor memory, respectively, andthe control section includes table search means for searching for "empty state"-indicative data stored in the memory positions of the table memory in a predetermined sequence and stopping a search operation in response to a first detection of the memory position corresponding to one of the blocks which is in an empty state, and pointer means for issuing address data for designating the one of the blocks which has been detected by the table searching means and is in the empty state.

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