Memory apparatus and memory control method
First Claim
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1. A memory apparatus comprising:
- a semiconductor memory having a memory area divided in a plurality of blocks for selectively storing data and batch-erasing data in units of a block; and
a control section connected to a host computer for controlling a read/write operation in accordance with a command therefrom and having a table memory which has a plurality of memory positions in one-to-one correspondence with the blocks of the semiconductor memory, and stores data indicating absence of data in a memory position thereof which corresponds to one of the blocks in which no data is stored,wherein the control section includes means for designating the memory positions of the table memory by means of addresses allocated to the blocks of the semiconductor memory, respectively, andthe control section includes table search means for searching for "empty state"-indicative data stored in the memory positions of the table memory in a predetermined sequence and stopping a search operation in response to a first detection of the memory position corresponding to one of the blocks which is in an empty state, and pointer means for issuing address data for designating the one of the blocks which has been detected by the table searching means and is in the empty state.
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Abstract
An empty block table is constructed by 64 words×8 bits and has 512 memory positions 000H(A0) to IFFH(A511) one-to-one corresponding to 512 blocks BL0 to BL511 within a flash memory FMi. Empty data [a] of 1 bit is stored to each memory position (Aj). This empty data has value "1" when a block BLj corresponding to this memory position (Aj) is in an empty state at present. The empty data also has value "0" when no block BLj corresponding to this memory position (Aj) is in the empty state at present (when data are included in this block).
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Citations
14 Claims
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1. A memory apparatus comprising:
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a semiconductor memory having a memory area divided in a plurality of blocks for selectively storing data and batch-erasing data in units of a block; and a control section connected to a host computer for controlling a read/write operation in accordance with a command therefrom and having a table memory which has a plurality of memory positions in one-to-one correspondence with the blocks of the semiconductor memory, and stores data indicating absence of data in a memory position thereof which corresponds to one of the blocks in which no data is stored, wherein the control section includes means for designating the memory positions of the table memory by means of addresses allocated to the blocks of the semiconductor memory, respectively, and the control section includes table search means for searching for "empty state"-indicative data stored in the memory positions of the table memory in a predetermined sequence and stopping a search operation in response to a first detection of the memory position corresponding to one of the blocks which is in an empty state, and pointer means for issuing address data for designating the one of the blocks which has been detected by the table searching means and is in the empty state. - View Dependent Claims (2, 3, 4)
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5. A memory apparatus comprising:
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a plurality of semiconductor memories each having a memory area divided into a plurality of blocks for selectively storing data and batch-erasing data in units of a block; an empty block table administrating section having an address counter common to the semiconductor memories, a control logic circuit, a SRAM having parallel memory regions corresponding to the semiconductor memories, respectively, a plurality of empty registers, an encoder and a plurality of pointer registers, and wherein each of the memory regions of the SRAM has an empty block table for registering at least one empty block of each of the semiconductor memories, and writes "empty state"-indicative data in the table when it receives write-in address data from the address counter, a writing control signal from the control logic circuit and "empty state"-indicative data from the data register. - View Dependent Claims (6, 7, 8)
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9. A memory control method comprising the steps of:
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preparing a semiconductor memory device connected to a host computer and executing a read/write operation in accordance with a command from the host computer; providing a plurality of memory positions in a table memory, the memory positions corresponding to a plurality of blocks obtained by dividing a memory area of the semiconductor memory device, wherein data is selectively stored in said blocks and batch-erased from said blockselectively storing data and batch-erasing data in units of a block; storing "empty state"-indicative data indicating absence of data in at least one of the memory positions of the table memory which corresponds to at least one of the blocks which contains no data; and detecting at least one empty block by searching the table memory for the "empty state"-indicative data in a data writing mode. - View Dependent Claims (10, 11, 12, 13, 14)
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Specification