Semiconductor device and method of manufacturing the same

• US 5,989,982 A
• Filed: 11/10/1997
• Issued: 11/23/1999
• Est. Priority Date: 10/08/1997
• Status: Expired due to Fees

• Current Assignee: Oki Semiconductor Company Limited (ROHM Co., Ltd.)
• Original Assignee: OKI Electric Industry Company Limited
• Inventors: Yoshikazu, Takahashi
• Primary Examiner(s): Picardat, Kevin M.
• Application Number:
  US08/967,022
• Time in Patent Office: 743 Days
• Field of Search: 438/113, 438/114, 438/458, 438/459, 438/460, 438/462, 438/464, 438/465
• US Class Current: 438/462
• CPC Class Codes: H01L 21/561 Batch processing
• CPC Class Codes: H01L 21/565 Moulds
• CPC Class Codes: H01L 21/568 Temporary substrate used as encapsulation process aid H01L21/4832 and H01L21/566 take precedence
• CPC Class Codes: H01L 21/6836 Wafer tapes, e.g. grinding or dicing support tapes adhesive tapes in general C09J7/20
• CPC Class Codes: H01L 21/78 with subsequent division of the substrate into plural individual devices cutting to change the surface-physical characteristics or shape of semiconductor bodies H01L21/304
• CPC Class Codes: H01L 2221/68327 used during dicing or grinding
• CPC Class Codes: H01L 2224/03 Manufacturing methods
• CPC Class Codes: H01L 2224/11 Manufacturing methods
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/274 by blanket deposition of the material of the layer connector
• CPC Class Codes: H01L 2224/94 at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
• CPC Class Codes: H01L 23/3114 the device being a chip scale package, e.g. CSP
• CPC Class Codes: H01L 24/27 Manufacturing methods
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2924/01004 Beryllium [Be]
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/18161 : of a flip chip

Abstract

Disclosed herein is a method of manufacturing a semiconductor device, according to the present invention, wherein a wafer is divided into individual fractions by a diamond blade, the entire surface of the wafer, which include gaps between the respective fractions, is thereafter sealed with a resin, and the wafer is divided into individual fractions again by a diamond blade narrower than another diamond blade in width, whereby a chip size package in which the resin is being left on one sides of a chip, can be obtained. According to the method referred to above, a chip size package in which chip sides are also sealed with the resin, can be easily manufactured.

Claims

1. A method of manufacturing a semiconductor device, comprising the steps of:

forming protruded electrodes in a plurality of element regions of a wafer having said plurality of element regions formed on the surface thereof;

forming a sealing resin having concave portions provided on said wafer surface, said concave portions defining boundaries among said plurality of element regions, in a state in which surfaces of said protruded electrodes are being exposed;

forming ball electrodes on the protruded electrodes exposed from said sealing resin respectively; and

dividing said plurality of element regions into individual elements with said concave portions as standards.

2. A method according to claim 1, wherein the surfaces of said protruded electrodes are rendered uniform in height after the formation of said protruded electrodes.

3. A method according to claim 1, wherein said sealing resin forming step is executed using a mold having convex portions corresponding to said concave portions.

4. A method according to claim 3, wherein the heights of the surfaces of said protruded electrodes are made uniform by said mold before said elements are resin-sealed by the mold.

5. A method according to claim 1, wherein said each protruded electrode is formed by plating.

6. A method according to claim 1, wherein said concave portions are grooves defined along said plurality of element regions to be divided into said plurality of elements.

7. A method of manufacturing a semiconductor device, comprising the steps of:

forming protruded electrodes in a plurality of element regions of a wafer having said plurality of element regions formed on the surface thereof;

forming a sealing resin having concave portions provided on the surface of said wafer, said surface including surfaces of said protruded electrodes, said concave portions extending to the neighborhood of the surface of said wafer and defining boundaries among said plurality of element regions;

polishing the sealing resin until the surfaces of said protruded electrodes are exposed;

forming ball electrodes on the protruded electrodes exposed from said sealing resin respectively; and

dividing said plurality of element regions into individual elements with said concave portions as standards.

8. A method of manufacturing a semiconductor device, comprising the steps of:

respectively forming protruded electrodes in a plurality of element regions of a wafer having said plurality of element regions provided on a surface thereof;

applying said wafer to a scribe sheet and thereafter dividing said plurality of element regions into individual elements;

forming a sealing resin on said wafer surface including gaps between said adjacent respective divided elements in a state in which said protruded electrodes are being exposed;

forming ball electrodes on the protruded electrodes exposed from the sealing resin; and

dividing said elements into individual fractions in a state in which the resin on each element side, of the sealing resin formed within the gaps between the respective elements is being left behind.

9. A method according to claim 8, wherein said dividing step before forming the sealing resin is executed by a first blade relatively broad in width and said dividing step after forming the sealing resin is executed by a second blade relatively narrow in width.

10. A method according to claim 9, wherein the width of said f first blade is substantially twice the width of said second blade.

11. A method of manufacturing a semiconductor device, comprising the steps of:

respectively forming protruded electrodes in a plurality of element regions of a wafer having said plurality of element regions formed on a surface thereof;

applying said wafer to a scribe sheet and thereafter dividing said plurality of element regions into elements;

elongating the scribe sheet to widen intervals between said respective divided elements;

forming a sealing resin on said wafer surface including the intervals between said respective widened elements in a state in which said protruded electrodes are being exposed;

forming ball electrodes on the protruded electrodes exposed from the sealing resin respectively; and

dividing the elements into individual fractions in a state in which the resin on each element side, of the sealing resin formed within the gap between the adjacent elements is being left behind.