High density semiconductor package

• US 5,990,566 A
• Filed: 05/20/1998
• Issued: 11/23/1999
• Est. Priority Date: 05/20/1998
• Status: Expired due to Term

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Farnworth, Warren M., Wood, Alan G., Akram, Salman, Brooks, Mike, Cloud, Eugene
• Primary Examiner(s): Clark, Sheila V.
• Application Number:
  US09/082,093
• Time in Patent Office: 552 Days
• Field of Search: 257/685, 257/686, 257/782, 257/783, 257/693, 257/692, 257/696, 257/723, 257/724, 257/704, 257/727
• US Class Current: 257/783
• CPC Class Codes: H01L 2225/0652 Bump or bump-like direct electrical connections from substrate to substrate
• CPC Class Codes: H01L 2225/06551 Conductive connections on the side of the device
• CPC Class Codes: H01L 2225/06575 Auxiliary carrier between devices, the carrier having no electrical connection structure
• CPC Class Codes: H01L 2225/06579 TAB carriers; beam leads
• CPC Class Codes: H01L 23/4985 Flexible insulating substrates H01L23/49572 and H01L23/49855 take precedence
• CPC Class Codes: H01L 24/72 Detachable connecting means consisting of mechanical auxiliary parts connecting the device, e.g. pressure contacts using springs or clips
• CPC Class Codes: H01L 25/0657 Stacked arrangements of devices
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01004 Beryllium [Be]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01027 Cobalt [Co]
• CPC Class Codes: H01L 2924/01029 Copper [Cu]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01074 Tungsten [W]
• CPC Class Codes: H01L 2924/01075 Rhenium [Re]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/01082 Lead [Pb]
• CPC Class Codes: H01L 2924/01087 Francium [Fr]
• CPC Class Codes: H01L 2924/12044 OLED
• CPC Class Codes: H01L 2924/14 Integrated circuits
• CPC Class Codes: H01L 2924/3011 : Impedance
• CPC Class Codes: H01L 2924/351 : Thermal stress

Abstract

A semiconductor package and a method of fabrication are provided. The package includes multiple semiconductor dice contained in a housing, and mounted on edge to a substrate. Each die includes a polymer interconnect which attaches to a face of the die, and wraps around an end (or side) of the die. The polymer interconnect includes a flexible polymer tape with patterns of conductors. The conductors include microbumps for bonding to the die bond pads, and edge contacts for electrical connection to mating contacts on the substrate. The package also includes a force applying mechanism for biasing the dice against the substrate. In alternate embodiments, the polymer interconnect includes resilient edge contacts, cantilevered edge contacts, or multi level edge contacts.

Claims

1. A semiconductor package comprising:

a substrate comprising a first contact on a first polymer film attached to the substrate;

a semiconductor die having a side and a face with a bond pad thereon;

a second polymer film attached to the face and the side of the die comprising a conductor in electrical communication with the bond pad and a second contact proximate the side of the die;

a housing on the substrate configured to edge mount the die on the side to the substrate with the second contact in non-bonded electrical contact with the first contact;

a first compressible member between the first polymer film and the substrate configured to resiliently bias the first contact and the second contact together; and

a lid attached to the housing and a second compressible member within the housing configured to bias the die and the substrate together.

2. The package of claim 1 wherein the first compressible member comprises silicone.

3. The package of claim 1 wherein the second compressible member comprises an elastomeric material or a bladder.

4. The package of claim 1 wherein the housing comprises a plurality of cavities configured to retain a plurality of dice.

5. A semiconductor package comprising:

a semiconductor die having a face with a bond pad thereon and a side;

a first polymer film on the face and the side of the die comprising a microbump bonded to the bond pad on the die and a first contact in electrical communication with the microbump and located proximate the side of the die;

a housing comprising a cavity configured to edge mount the die on the side;

a substrate on the housing;

a second polymer film on the substrate comprising a second contact configured to form a non-bonded electrical connection with the first contact on the first polymer film;

a lid attached to the housing and a first compressible member between the lid and the die configured to bias the die against the substrate with a force; and

a second compressible member between the second polymer film and the second contact configured to bias the second contact against the first contact upon application of the force.

6. The package of claim 5 wherein the second compressible member comprises an elastomeric material.

7. The package of claim 5 wherein the second contact comprises a second microbump.

8. The package of claim 5 wherein the first polymer film comprises a via wherein the microbump is formed and the microbump and the first contact are on opposing sides of the first polymer film.

9. A semiconductor package comprising:

a substrate comprising a first polymer film and a first contact on the first polymer film;

a first compressible member between the first polymer film and the substrate;

a semiconductor die edge mounted to the substrate comprising a face with a bond pad thereon and a side;

a second polymer film attached to the face and to the side of the die comprising a conductor in electrical communication with the bond pad on the die, and a second contact proximate the side of the die in electrical communication with the conductor;

a housing mounted to the substrate comprising a cavity configured to edge mount the die on the side to the substrate, with the first contact on the substrate in non-bonded electrical communication with the second contact and biased against the second contact by the first compressible member;

a lid attached to the housing; and

a second compressible member mounted within the housing between the lid and the die, the second compressible member configured to bias the die against the substrate and to permit removal of the die.

10. The package of claim 9 wherein the first contact comprises a bump and the second contact comprises a planar pad.

11. The package of claim 9 wherein the first contact comprises a planar pad and the second contact comprises a bump.

12. The package of claim 9 wherein the first compressible member and the second compressible member comprise an elastomeric.

13. The package of claim 9 wherein the second compressible member comprises a gas or liquid filled bladder.

14. A semiconductor package comprising:

a substrate comprising a first polymer film and a plurality of first contacts on the first polymer film;

a semiconductor die having a side and a face with a plurality of bond pads thereon;

a second polymer film attached to the face and side of the die comprising a plurality of conductors in electrical communication with the bond pads, the conductors formed on opposed sides of the second polymer film, the conductors including second contacts proximate the side of the die;

a housing attached to the substrate, the housing configured to mount the die on the side to the substrate with the first contacts on the first polymer film in electrical contact with the second contacts on the second polymer film;

a first compressible member between the first polymer film and the substrate configured to bias the first contacts and the second contacts together; and

a lid attached to the housing and a second compressible member between the lid and the die configured to bias the die and the substrate together and to permit removal and replacement of the die.

15. The package of claim 14 wherein at least one of the conductors on the second polymer film comprises a ground plane.

16. The package of claim 14 wherein at least one of the conductors on the second polymer film comprises a voltage plane.

17. The package of claim 14 wherein the first contacts comprise bumps and the second contacts comprise planar pads.

18. The package of claim 14 wherein the first contacts comprise planar pads and the second contacts comprise bumps.

19. A semiconductor package comprising:

a semiconductor die having a face with a bond pad thereon and a side;

a polymer film attached to the face of the die, the polymer film comprising a conductor and a first contact in electrical communication with the conductor, the first contact and at least a portion of the conductor cantilevered over the side of the die and configured to exert a spring force;

a housing configured to edge mount the die on the side; and

a substrate attached to the housing comprising a second contact configured to electrically engage the first contact as the spring force biases the first contact against the second contact.

20. The package of claim 19 wherein the portion of the conductor comprises beryllium copper.

21. A semiconductor package comprising:

a substrate comprising a first contact;

a semiconductor die having a side and a face with a bond pad thereon;

a polymer film attached to the face of the die comprising a conductor in electrical communication with the bond pad and a second contact proximate the side of the die, the second contact and at least a portion of the conductor cantilevered over the side of the die and configured to exert a spring force;

a housing on the substrate configured to edge mount the die to the substrate with the second contact biased against the first contact by the spring force; and

a lid attached to the housing and a compressible member within the housing configured to bias the die and the substrate together.

22. The package of claim 21 wherein the portion of the conductor comprises beryllium copper.