Application programming interface for managing and automating data transfer operations between applications over a bus structure

• US 5,991,520 A
• Filed: 02/02/1996
• Issued: 11/23/1999
• Est. Priority Date: 02/02/1996
• Status: Expired due to Term

• Current Assignee: Apple Computer Incorporated (Apple Inc.), Sony Corporation (Sony Group Corp.), Sony Electronics Inc. (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.), Sony Electronics Inc. (Sony Group Corp.)
• Inventors: Smyers, Scott D., Fairman, Bruce
• Primary Examiner(s): Sheikh, Ayaz R.
• Assistant Examiner(s): Thlang, Eric S.
• Application Number:
  US08/594,651
• Time in Patent Office: 1,390 Days
• Field of Search: 395/280, 395/700, 395/200.08, 395/855, 395/682, 348/7, 364/200, 370/60, 370/94.2, 370/13, 370/395, 370/84, 11/60.1
• US Class Current: 710/100
• CPC Class Codes: G06F 13/10 Program control for peripheral devices G06F13/14 - G06F13/42 take precedence
• CPC Class Codes: G06F 13/102 where the programme performs an interfacing function, e.g. device driver G06F13/105 takes precedence; scheduling within device drivers G06F9/52; contention policies within device drivers G06F9/4881
• CPC Class Codes: G06F 13/28 using burst mode transfer, e.g. direct memory access DMA, cycle steal G06F13/32 takes precedence
• CPC Class Codes: H04L 12/40058 Isochronous transmission
• CPC Class Codes: H04L 12/40065 Bandwidth and channel allocation home automation networks H04L12/2803; flow control H04L47/10
• CPC Class Codes: H04L 12/40123 Interconnection of computers and peripherals printer information exchange with computer G06F3/1293
• CPC Class Codes: H04L 49/90 Buffering arrangements
• CPC Class Codes: H04L 49/901 using storage descriptor, e.g. read or write pointers
• CPC Class Codes: H04L 49/9031 Wraparound memory, e.g. overrun or underrun detection
• CPC Class Codes: H04L 49/9047 including multiple buffers, e.g. buffer pools
• CPC Class Codes: H04L 69/32 Architecture of open systems interconnection [OSI] 7-layer type protocol stacks, e.g. the interfaces between the data link level and the physical level
• CPC Class Codes: H04L 69/321 Interlayer communication protocols or service data unit [SDU] definitions; Interfaces between layers

Abstract

An applications programming interface implements and manages isochronous and asynchronous data transfer operations between an application and a bus structure. During an asyncronous transfer the API includes the ability to transfer any amount of data between one or more local data buffers within the application and a range of addresses over the bus structure using one or more asynchronous transactions. An automatic transaction generator may be used to automatically generate the transactions necessary to complete the data transfer. The API also includes the ability to transfer data between the application and another node on the bus structure isochronously over a dedicated channel. During an isochronous data transfer, a buffer management scheme is used to manage a linked list of data buffer descriptors. This linked descriptor list can form a circular list of buffers and include a forward pointer to the next buffer in the list and a backward pointer to the previous buffer in the list for each buffer. The linked descriptor list may also form a linear list to which the application can append additional buffers or remove existing buffers from the list. During isochronous transfers of data, the API provides implementation of a resynchronization event in the stream of data allowing for resynchronization by the application to a specific point within the data. Implementation is also provided for a callback routine for each buffer in the list which calls the application at a predetermined point during the transfer of data.

Claims

1. An interface between an application and a bus structure for controlling data transfers to and from the application over the bus structure comprising:

a. means for controlling asynchronous data transfers between the application and the bus structure for providing a memory-mapped interface to the application, wherein the means for controlling asynchronous data transfers automatically generates requests necessary to complete an asynchronous transfer of data across the bus structure;

b. means for controlling isochronous data transfers between the application and the bus structure including a linked list of buffers.

2. The interface as claimed in claim 1 wherein the means for controlling asynchronous data transfers transmits to or receives the data from the bus structure in packets each having a header including a destination identifier, an address and a length value.

3. The interface as claimed in claim 2 wherein the means for controlling asynchronous data transfers includes an automated hardware interface for automatically generating the requests necessary to complete an asynchronous transfer of data across the bus structure.

4. The interface as claimed in claim 3 wherein the bus structure is an IEEE 1394 standard bus structure.

5. The interface as claimed in claim 1 wherein each of the linked buffers includes a forward pointer and a backward pointer.

6. The interface as claimed in claim 5 wherein each of the linked buffers include a callback routine for calling the application at a predetermined point during a data transfer operation.

7. The interface as claimed in claim 6 wherein each of the linked buffers further include a resynchronization event for resynchronizing the application to the data transfer.

8. The interface as claimed in claim 7 further comprising means to add buffers to the linked list.

9. The interface as claimed in claim 8 further comprising means to remove buffers from the linked list.

10. An interface between an application and a bus structure for controlling data transfer operations between the application and the bus structure comprising:

a. an applications interface for communicating with the application and receiving requests from and sending instructions to the application;

b. an automatic transaction generator for automatically generating transactions necessary to complete an asynchronous data transfer operation between a buffer assigned by the application and a node on the bus structure;

c. means for controlling an isochronous data transfer including a linked list of buffers provided by the application with which the data transfer is to be completed; and

d. a bus interface for providing a physical interface to the bus structure for sending and receiving data packets over the bus structure.

11. The interface as claimed in claim 10 wherein the linked list of buffers includes a forward pointer and a backward pointer for each buffer.

12. The interface as claimed in claim 11 wherein each of the buffers include a callback routine which is activated to call the application at a predetermined point during a data transfer operation.

13. The interface as claimed in claim 12 wherein each of the buffers include a resynchronization event which is activated to resynchronize the application to a predetermined point during a data transfer operation.

14. The interface as claimed in claim 13 further comprising means to add buffers to the linked list.

15. The interface as claimed in claim 14 further comprising means to remove buffers from the linked list.

16. The interface as claimed in claim 10 wherein the automatic transaction generator is implemented in a hardware logic circuit.

17. The interface as claimed in claim 10 wherein the automatic transaction generator is implemented in software.

18. A method of providing a memory-mapped interface to an application and managing asynchronous data transfer operations between the application and a bus structure comprising the steps of:

a. receiving a request for a data transfer operation from the application;

b. providing an instruction to an automatic transaction generator for automatically generating transactions necessary to complete the data transfer operation across the bus structure; and

c. notifying the application when the data transfer operation is complete.

19. The method as claimed in claim 18 wherein the request includes an address for an application buffer, a starting address in an address space of the bus structure, a length of data to be transferred and a direction of the transfer.

20. The method as claimed in claim 19 wherein the starting address is a 64 bit address.

21. The method as claimed in claim 20 wherein the bus structure is an IEEE 1394 standard bus structure.

22. The method as claimed in claim 18 wherein the automatic transaction generator is implemented in a hardware logic circuit.

23. The method as claimed in claim 18 wherein the automatic transaction generator is implemented in software.

24. An interface between an application and a bus structure for managing data transfer operations between the application and bus structure comprising:

a. means for communicating with the application for receiving requests from and sending instructions to the application;

b. an automatic transaction generator for automatically generating transactions necessary to complete an asynchronous data transfer operation between a buffer of the application and a node on the bus structure; and

c. means for monitoring and communicating over the bus structure for sending and receiving data packets from the bus structure.

25. The interface as claimed in claim 24 wherein a data transfer operation is initiated when the application sends a request to the means for communicating.

26. The interface as claimed in claim 25 wherein the request includes an address for the buffer of the application, a starting address across the bus structure, a length of data to be transferred and a direction of the transfer.

27. The interface as claimed in claim 26 wherein the bus structure is an IEEE 1394 standard bus structure.

28. The interface as claimed in claim 24 further comprising means for controlling an isochronous data transfer operation between the application and the bus structure.

29. The interface as claimed in claim 28 wherein the means for controlling an isochronous data transfer operation maintains a linked list of buffers provided by the application with which the data transfer is to be completed.

30. The interface as claimed in claim 29 wherein the linked list includes a forward pointer and a backward pointer for each buffer in the list.

31. The interface as claimed in claim 29 wherein each of the buffers included in the list include a callback routine which is activated to call the application at a predetermined point during a data transfer operation.

32. The interface as claimed in claim 31 wherein each of the buffers included in the list include a resynchronization event which is activated to resynchronize the application to a predetermined point during a data transfer operation.

33. An interface between an application and an IEEE 1394 standard bus structure for managing data transfer operations between the application and the bus structure comprising:

a. an applications interface for communicating with the application and receiving requests from and sending instructions to the application;

b. an automatic transaction generator for automatically generating transactions necessary to complete an asynchronous data transfer operation between a buffer assigned by the application and a node on the bus structure; and

c. a bus interface circuit for providing a physical interface to the bus structure for sending and receiving data packets over the bus structure.

34. The interface as claimed in claim 33 wherein a data transfer operation is initiated when the application sends a request to the applications interface.

35. The interface as claimed in claim 34 wherein the request includes an address for the buffer of the application, a starting address across the bus structure, a length of data to be transferred and a direction of the transfer.

36. The interface as claimed in claim 35 wherein the bus structure is an IEEE 1394 standard bus structure.

37. The interface as claimed in claim 33 wherein the automatic transaction generator is implemented in a hardware logic circuit.

38. The interface as claimed in claim 33 wherein the automatic transaction generator is implemented in software.

39. A method of providing an interface to an application and managing isochronous data transfer operations between the application and a bus structure comprising the steps of:

a. receiving a request for a data transfer operation from the application; and

b. managing a linked list of buffer descriptors each corresponding to a buffer provided by the application for completing the data transfer operation, wherein data is transferred between one buffer and the bus structure while the application processes another buffer.

40. The method as claimed in claim 39 wherein during an isochronous send operation the application processes a buffer by loading data into the buffer.

41. The method as claimed in claim 39 wherein during an isochronous receive operation the application processes a buffer by obtaining data from the buffer.

42. The method as claimed in claim 39 wherein the linked list includes a forward pointer and a backward pointer for each buffer within the linked list.

43. The method as claimed in claim 39 wherein each of the buffers in the linked list include capability for a callback routine which is activated to call the application at a predetermined point during a data transfer operation.

44. The method as claimed in claim 39 wherein each of the buffers included in the list include capability for a resynchronization event which is activated to resynchronize the application to a predetermined point during a data transfer operation.

45. The method as claimed in claim 42 further comprising means to add buffer descriptors to the linked list.

46. The method as claimed in claim 45 further comprising means to remove buffer descriptors from the linked list.

47. An interface between an application and a bus structure for managing data transfer operations between the application and the bus structure comprising:

a. means for communicating with the application for receiving requests from and sending instructions to the application;

b. means for controlling isochronous data transfer operations between the application and the bus structure including managing a linked list of buffer descriptors, each corresponding to and representing a buffer; and

c. means for monitoring and communicating over the bus structure for sending and receiving data packets from the bus structure.

48. The interface as claimed in claim 47 wherein the buffers are provided by the application.

49. The interface as claimed in claim 48 wherein the linked list includes a forward pointer for each buffer within the linked list.

50. The interface as claimed in claim 49 wherein the linked list further includes a backward pointer for each buffer within the linked list thereby making the list circular.

51. The interface as claimed in claim 47 wherein each of the buffer descriptors in the linked list include capability for a callback routine which is activated to call the application at a predetermined point during a data transfer operation.

52. The interface as claimed in claim 47 wherein each of the buffer descriptors included in the list include capability for a resynchronization event which is activated to resynchronize the application to a predetermined point during a data transfer operation.

53. The interface as claimed in claim 47 further comprising an automatic transaction generator for automatically generating transactions necessary to complete an asynchronous data transfer operation between a buffer assigned by the application and the bus structure.

54. The interface as claimed in claim 53 wherein the bus structure is an IEEE 1394 standard bus structure.

55. The interface as claimed in claim 48 wherein the linked list includes a forward pointer and a backward pointer for each buffer within the linked list thereby making the list linear.

56. The interface as claimed in claim 55 further comprising means to add buffers to the linked list.

57. The interface as claimed in claim 56 further comprising means to remove buffers from the linked list.

58. An interface between an application and an IEEE 1394 standard bus structure for managing data transfer operations between the application and the bus structure comprising:

a. an applications interface for communicating with the application and receiving requests from and sending instructions to the application;

b. means for controlling isochronous data transfer operations between the application and the bus structure including a linked list of buffers provided by the application; and

c. a bus interface circuit for providing a physical interface to the bus structure for sending and receiving data packets over the bus structure.

59. The interface as claimed in claim 58 wherein the linked list includes a forward pointer and a backward pointer for each buffer within the linked list thereby making the list circular.

60. The interface as claimed in claim 59 wherein each of the buffers in the linked list include capability for a callback routine which is activated to call the application at a predetermined point during a data transfer operation.

61. The interface as claimed in claim 60 wherein each of the buffers included in the list include capability for a resynchronization event which is activated to resynchronize the application to a predetermined point during a data transfer operation.

62. The interface as claimed in claim 58 wherein the linked list includes a forward pointer and a backward pointer for each buffer within the linked list thereby making the list linear.

63. The interface as claimed in claim 62 further comprising means to add buffers to the linked list.

64. The interface as claimed in claim 63 further comprising means to remove buffers from the linked list.