Silicon wafer or die strength test fixture using high pressure fluid

• US 5,992,242 A
• Filed: 05/04/1998
• Issued: 11/30/1999
• Est. Priority Date: 05/04/1998
• Status: Expired due to Term

• Current Assignee: Bell Semiconductor, LLC (Hilco Inc. (d/b/a Hilco Global))
• Original Assignee: LSI Logic Corporation (Broadcom, Inc.)
• Inventors: Murphy, Adrian, Thavarajah, Manickam
• Primary Examiner(s): RAEVIS, ROBERT R
• Application Number:
  US09/072,915
• Time in Patent Office: 575 Days
• Field of Search: 73/837, 73/838, 73/840, 73/849, 73/851, 73/816, 73/812
• US Class Current: 73/840
• CPC Class Codes: G01N 3/10 generated by pneumatic or hydraulic pressure G01N3/18 takes precedence

Abstract

An Integrated Circuit (IC) wafer test fixture includes a baseplate and a top plate. During testing, an IC wafer is positioned between the baseplate and top plate with annular rubber gaskets, forming sealed cavities above and below the IC wafer. A fluid pressure generator with a pressure gauge inserts a fluid under pressure into one of the cavities, causing the IC wafer to be subject to stress. The fluid distributes a uniform pressure load on the surface of the IC wafer. The pressure of the fluid may be gradually increased until a desired pressure is obtained or the wafer fails. The pressure at failure is recorded, and by calculation the failure stress of the IC wafer can be determined. A second embodiment of the test fixture includes a pressure vessel with a threaded sealed opening at the top and a stepped sealed opening at the bottom. The inner diameter of the insert is sized for an IC wafer. In use, the IC wafer is positioned on top of the insert, and the pressure vessel is sealed. A fluid pressure generator with a pressure gauge injects fluid under a controlled pressure within the sealed pressure chamber, stressing the IC wafer, as a uniform pressure load is distributed over the surface of the IC wafer. The pressure recorded, and by calculation the stress of the IC wafer may be determined.

Claims

1. A method of testing an integrated circuit (IC) wafer comprising the steps of:

providing an IC wafer;

providing a wafer test fixture, the wafer test fixture having a base plate and a top plate;

holding the wafer between the base plate and top plate;

sealably attaching the wafer to the base plate so as to form a first cavity underneath the wafer;

sealably attaching the wafer to the top plate so as to form a second cavity above the wafer;

pressurizing the first cavity to stress the wafer;

measuring the pressure in the pressurized cavity; and

measuring the deflection of the integrated circuit wafer from the pressurized cavity.