Ball grid array semiconductor package

• US 5,994,773 A
• Filed: 03/06/1997
• Issued: 11/30/1999
• Est. Priority Date: 03/06/1996
• Status: Expired due to Fees

• Current Assignee: Fuji Machinery Mfg. & Electronics Co., Ltd. (Kyoden Company Limited)
• Original Assignee: Fuji Machinery Mfg. & Electronics Co., Ltd. (Kyoden Company Limited)
• Inventors: Hirakawa, Tadashi
• Primary Examiner(s): Kelley, Nathan K.
• Application Number:
  US08/811,810
• Time in Patent Office: 999 Days
• Field of Search: 257/738, 257/787, 257/779, 257/697, 257/692, 257/693, 257/668, 257/702, 257/780
• US Class Current: 257/702
• CPC Class Codes: H01L 21/486 Via connections through the substrate with or without pins
• CPC Class Codes: H01L 2224/16237 the bump connector connecting to a bonding area disposed in a recess of the surface of the item
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48465 the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
• CPC Class Codes: H01L 23/49816 Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 23/49827 Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01039 Yttrium [Y]
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/01322 Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/09701 Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/12042 LASER
• CPC Class Codes: H01L 2924/15173 : in a single layer of the multilayer substrate
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/207 : Diameter ranges

Abstract

A ball grid array semiconductor package includes an insulative base material; circuitry metallizations formed on a first surface of the material, each metallization having a grid pad electrode; and a semiconductor chip mounted on the first surface and electrically connected to the circuitry metallizations. The base material is opened from a second surface of the base material at a location under each grid pad electrode; and each opening confines a portion of a solder ball which is in melt-fixed connection to a back side of each grid electrode.

Claims

1. A ball grid array semiconductor package, consisting of:

an insulative base material in the form of a flexible film or sheet;

circuitry metallizations formed on a first surface of the insulative base material, each circuitry metallization having a grid pad electrode on said first surface of the base material, wherein the metallizations are in the form of a single-sided copper clad laminate on the insulative base material and said grid pad electrodes are patterned-etched grid pad electrodes;

a semiconductor chip mounted on said first surface of the insulative base material juxtaposed to said circuitry metallizations and in substantially the same plane as said circuitry metallizations and electrically connected to said circuitry metallizations;

a rigid, resin envelope molded over substantially all of said first surface of said insulative base material and encapsulating said semiconductor chip such that no flexible portion of said base material is left peripherally exposed thereby;

wherein the insulative base material is open from an opposite second surface of the insulative base material to the first surface of the insulative base material to form an opening through said insulative base material and at a location under each grid pad electrode;

a solder ball in each of said openings in a melt-fixed connection to a back side of each grid pad electrode; and

wherein each opening without the need of a solder mask confines a portion of each solder ball which is in the melt-fixed connection to a back side of each grid pad electrode facing the second surface of the insulative base material.

2. A ball grid array package as defined in claim 1 wherein the insulative base material is a long film trip.

3. A ball grid array package as defined in claim 1 wherein the insulative base material is a polyimide film.

4. A ball grid array package as defined in claim 1 wherein the insulative base material includes a reinforcement of aramid fibers.

5. A ball grid array package as defined in claim 1 wherein said opening is a tapered opening expanding toward said second surface of the insulative base material.

6. A ball grid array package as defined in claim 5 where the angle of the tapered opening is from 1 to 30 degrees.

7. A ball grid array package as defined in claim 1 wherein the opening has a smaller diameter than a diameter of the grid pad electrode.

8. A ball grid array package as defined in claim 1 wherein the insulative base material is about 40 microns in thickness and said metallizations and grid pad electrodes are about 18 microns in thickness.

9. A ball grid array package as defined in claim 1, wherein the openings are formed with a laser.

10. A ball grid array package as defined in claim 1, wherein the openings are formed by punching.

11. A ball grid array package as defined in claim 1, wherein said back sides of said grid pad electrodes and portions of said metallizations are plated with nickel or gold.