Method and apparatus for N choose M device selection

• US 5,995,016 A
• Filed: 12/17/1996
• Issued: 11/30/1999
• Est. Priority Date: 12/17/1996
• Status: Expired due to Fees

• Current Assignee: Rambus Inc.
• Original Assignee: Rambus Inc.
• Inventors: Perino, Donald V.
• Primary Examiner(s): ZIMMERMAN, BRIAN A
• Application Number:
  US08/767,739
• Time in Patent Office: 1,078 Days
• Field of Search: 340/825.52, 341/102, 341/106, 341/95, 307/449, 326/106, 370/297, 370/528, 327/407, 327/415
• US Class Current: 340/2.4
• CPC Class Codes: G06F 12/06 Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication G06F12/08 takes precedence

Abstract

A method for selectively enabling one of X agents in a system so as to allow the selected agent to be active in a shared communication system. The method comprises the steps of assigning each agent to a unique subset M of a plurality of N select lines, M being greater than 1 and less than N, and translating an identification number so as to assert M of the plurality of N select lines. The asserted M select lines uniquely select a designated agent. For one embodiment, all of the X agents may be selected by enabling all N select lines. For another embodiment, more than one but not all of the agents may be selected.

Claims

1. An interconnect apparatus for selecting at least one of a plurality of selectable devices for communication, comprising:

a plurality of N select lines;

a plurality of connections arranged to couple each and every one of the plurality of selectable devices to a unique combination of M of the plurality of N select lines, wherein M is greater than one and less than N; and

wherein the at least one of the plurality of selectable devices is selected for communication by activating at least one of the unique combinations of M of the plurality of N select lines.

2. The apparatus of claim 1, wherein the maximum number of the plurality of selectable devices is equal to ##EQU4##

3. The apparatus of claim 1, wherein more than one but not all of the plurality of selectable devices is selected simultaneously for communication.

4. The apparatus of claim 1, wherein all of the plurality of selectable devices are selected simultaneously for communication.

9. The interconnect apparatus of claim 1, wherein the number of unique combinations of M of the N select lines is equal to ##EQU7##10.

5. A system comprising:

a first interconnect apparatus for selecting a subset of a plurality of selectable devices, the first interconnect apparatus comprising;

a plurality of N select lines;

a plurality of connections arranged to couple each of the plurality of selectable devices to an unique group of the plurality of N select lines, each unique group having at least one select line different from the select lines of any other unique group and each unique group comprising M of the plurality of N select lines wherein M is greater than one and less than N;

wherein a maximum number of the plurality of selectable devices is equal to a total number of the unique groups of the plurality of N select lines; and

wherein the at least one device is selected for communication by activating at least one of the unique groups; and

a second interconnect apparatus for selecting at least one of the subset of the plurality of selectable devices, said second interconnect apparatus comprising;

a plurality of Y select lines;

another plurality of connections coupling each of the plurality of selectable devices to an unique group of the plurality of Y select lines, each unique group of the plurality of Y select lines having at least one select line different from any other unique group and each unique group of the plurality of Y select lines comprising Z of the plurality of Y select lines wherein Z is greater than one and less than Y.

6. The system of claim 5, further comprising:

a master including a plurality of N outputs coupled to the plurality of N select lines, and a plurality of Y outputs coupled to the plurality of Y select lines.

7. The system of claim 5, wherein the maximum number of the plurality of selectable devices is equal to ##EQU5## multiplied by ##EQU6##

8. The system of claim 5, further comprising:

circuitry, within at least one of the plurality of selectable devices, sensing when at least one of the unique groups of M select lines and at least one of the unique groups of Z select lines is activated such that the at least one of the plurality of selectable devices is selected.

10. A system comprising:

a plurality of selectable devices;

an interconnect apparatus for selecting at least one of the plurality of selectable devices for communication, the interconnect apparatus comprising;

a plurality of N select lines

a plurality of connections arranged to couple each of the plurality of selectable devices to an unique group of the plurality of N select lines, each unique group having at least one select line different from the select lines of any other unique group and each unique group comprising M of the plurality of N select lines wherein M is greater than one and less than N;

wherein a maximum number of the plurality of selectable devices is equal to a total number of the unique groups of the plurality of N select lines; and

wherein the at least one device is selected for communication by activating at least one of the unique groups; and

a translator that translates an identification number into a combinatorial representation that specifies one of the unique groups of the plurality of N select lines to be asserted to enable one of the plurality of selectable devices in response to the combinatorial representation.

11. The system of claim 10, further comprising a master that includes the translator and provides the identification number.

12. The system of claim 10, wherein the translator, the interconnect apparatus, and one of the plurality of selectable devices are formed on a single semiconductor substrate.

13. The system of claim 10, wherein the identification number indicates more than one of the plurality of selectable devices, wherein the translator asserts more than one of the unique groups of the plurality of N select lines to enable more than one of the plurality of selectable devices.

14. The system of claim 10, further comprising:

circuitry, within at least one of the plurality of the selectable devices, sensing when at least one unique group of the plurality of N select lines is activated such that the at least one of the plurality of selectable devices is selected.

15. The system of claim 10, wherein the plurality of selectable devices comprises selectable memory devices.

16. The system of claim 10, further comprising a master coupled to the translator and providing the identification number.

17. A controller device comprising:

a plurality of N outputs;

a translator circuit coupled to the plurality of N outputs, wherein;

the translator circuit translates an identification number into a combinatorial representation that specifies which of the plurality of N outputs are to be asserted;

the N outputs are asserted at least M outputs at a time, wherein M is greater than one and less than N; and

the controller device is capable of selecting a maximum of X selectable devices, wherein X is equal to ##EQU8##

18. A method for selecting between a plurality of selectable devices, comprising the steps of:

assigning each and every one of the selectable devices to a unique combination of M of a plurality of N select lines wherein M is greater than one and less than N; and

asserting a first unique combination of the plurality of N select lines to select a first one of the plurality of selectable devices.

19. The method of claim 18, further comprising the step of:

asserting a second unique group of the plurality of N select lines that corresponds to a second selectable device to concurrently select the first and second selectable devices.

20. The method of claim 18, further comprising the step of:

asserting all of the plurality of N select lines to concurrently select all of the plurality of selectable devices.

21. The method of claim 18, further comprising separately asserting each unique combination of M of the plurality of N select lines to individually select ##EQU9## selectable devices.

22. The method of claim 18, further comprising the step of:

translating an identification number into a combinatorial representation that specifies which of the plurality of N select lines are to be asserted.

23. A system comprising:

a master including a plurality of N select outputs

a plurality of selectable devices; and

,

an interconnect apparatus arranged to couple each and every one of the plurality of selectable devices to a unique combination of M of the plurality of N select lines, wherein M is greater than one and less than N.

24. The system of claim 23, wherein the plurality of selectable devices is equal to ##EQU10##

25. A system comprising:

an N choose M selector arranged to couple each and every one of a plurality of selectable devices to a unique combination of M of a plurality of N select lines, wherein M is greater than one and less than N; and

##EQU11## groups of M of the plurality of N select lines.

26. The system of claim 25, further comprising ##EQU12## selectable devices each coupled to a corresponding one of the ##EQU13## groups of M of the plurality of N select lines.

27. The system of claim 25, wherein the N choose M selector comprises:

a translator circuit to translate an identification number into a combinatorial representation that specifies which of the unique combinations of M of the plurality of N select lines will be asserted by the N choose M selector; and

an interconnect matrix coupled to the translator circuit and the ##EQU14## groups of M of the plurality of N select lines.