Method and apparatus for interleaving and de-interleaving YUV pixel data

• US 5,995,080 A
• Filed: 06/21/1996
• Issued: 11/30/1999
• Est. Priority Date: 06/21/1996
• Status: Expired due to Term

• Current Assignee: Hewlett Packard Enterprise Development LP (Hewlett-Packard Enterprise Company)
• Original Assignee: Digital Equipment Corporation (HP Inc.)
• Inventors: Reilly, Matthew Howard, Biro, Larry Louis, Wheeler, William R., Adiletta, Matthew James
• Primary Examiner(s): Shalwala, Bipin H.
• Assistant Examiner(s): Kovalick, Vincent E.
• Application Number:
  US08/668,199
• Time in Patent Office: 1,257 Days
• Field of Search: 345/154, 345/185, 345/189, 345/201, 345/501, 345/507-508, 345/509, 345/526, 395/115, 395/484, 395/501, 395/507, 395/509, 395/526, 395/612, 707/101, 711/157
• US Class Current: 345/603
• CPC Class Codes: H04N 19/126 Details of normalisation or weighting functions, e.g. normalisation matrices or variable uniform quantisers
• CPC Class Codes: H04N 19/14 Coding unit complexity, e.g. amount of activity or edge presence estimation H04N19/146 takes precedence
• CPC Class Codes: H04N 19/146 Data rate or code amount at the encoder output
• CPC Class Codes: H04N 19/152 by measuring the fullness of the transmission buffer
• CPC Class Codes: H04N 19/176 the region being a block, e.g. a macroblock
• CPC Class Codes: H04N 19/177 the unit being a group of pictures [GOP]
• CPC Class Codes: H04N 19/42 characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation H04N19/635 takes precedence
• CPC Class Codes: H04N 19/51 Motion estimation or motion compensation
• CPC Class Codes: H04N 19/577 Motion compensation with bidirectional frame interpolation, i.e. using B-pictures
• CPC Class Codes: H04N 19/61 in combination with predictive coding
• CPC Class Codes: Y10S 707/99942 Manipulating data structure, e.g. compression, compaction, compilation

Abstract

An apparatus and method a method for performing two-pass real time video compression is provided. Tactical decisions such as encoding and quantization values are determined in software, whereas functional execution steps are performed in hardware. By appropriately apportioning the tasks between software and hardware, the benefits of each type of processing are exploited, while minimizing both hardware complexity and data transfer requirements. One key concept that allows the compression unit to operate in real time is that the architecture and pipelining both allow for B frames to be executed out of order. By buffering B frames, two-pass motion estimation techniques can be performed to tailor bit usage to the requirements of the frame, and thereby provide a more appealing output image.

Claims

1. A method for converting a plurality of received bytes, each byte having an associated type, from a first order of types to a second order of types comprising the steps of:

storing a plurality of received bytes in a storage device, where the location at which each of said plurality of bytes is stored is determined responsive to said type of said associated byte and responsive to a desired output order of types of said bytes;

wherein said first order of bytes is a plurality of bytes of a same type, and wherein said second order of bytes is a plurality of interleaved bytes of different types.

5. The method according to claim 1, wherein said storage device is further apportioned into a plurality of banks, further comprising the steps of:

storing different ones of said plurality of bytes of the same type in similar locations of different banks during a write operation, wherein successive pairs of input bytes are alternately stored in even and odd banks of said storage device.

6. The method according to claim 5, wherein said storage device is further apportioned into a plurality of bytes, and wherein said of storing further comprises the steps of:

storing said different pairs of input bytes in byte locations of said storage device in response to the row address to which said pair of bytes is being written.

7. The method according to claim 1, wherein said input bytes are received from logic in a first clock domain, and said output bytes are output to logic in a second clock domain, further comprising the steps of:

providing a second storage device identical to said first storage device;

alternatively filling said first storage device and said second storage device with input data from said first domain;

responsive to either of said first storage devices or said second storage devices being full, transferring control of said full storage device to said logic in said second clock domain.

2. A method for converting a plurality of received bytes, each byte having an associated type, from a first order of types to a second order of types comprising the steps of:

storing a plurality of received bytes in a storage device, where the location at which each of said plurality of bytes is stored is determined responsive to said type of said associated byte and responsive to a desired output order of types of said bytes;

wherein said second order of bytes is selected in response to a format signal indicative of a desired format of data output from said storage device.

3. The method according to claim 2 wherein said desired format is little endian interleaved 4:

2;

2 format.

4. The method according to claim 2 wherein said desired format is GIB-endian format.

8. A method for converting a plurality of received bytes, each byte having an associated type, from a first order of types to a second order of types comprising the steps of:

storing a plurality of received bytes in a storage device, where the location at which each of said plurality of bytes is stored is determined responsive to said type of said associated byte and responsive to a desired output order of types of said bytes;

wherein said first order of bytes includes a plurality of interleaved bytes of different types of data and wherein said second, output order of bytes comprises a plurality of bytes of the same type of data.

9. The method according to claim 8, wherein said storage device is apportioned into a plurality of sub-storage devices, each storage device storing one bit of each type of said plurality of interleaved input bytes.

10. The method according to claim 9, further comprising the steps of:

loading each bit of said sub-storage devices in response to an address of said sub-storage device and further in response to said type of each loaded bit.

11. The method according to claim 10, further comprising the steps of:

retrieving bits from said sub-storage device in response to an address of said sub-storage device and further in response to said type of said retrieved bit.

12. An apparatus for converting a plurality of received bytes, each byte having an associated type, from a first order of types to a second order of types comprising:

a storage device for storing a plurality of received bytes, where the storage location of each of said plurality of bytes is determined responsive to said type of said associated byte and responsive to a desired output order of types of said bytes;

wherein said first order of bytes is a plurality of bytes of a same type, and wherein said second order of bytes is a plurality of interleaved bytes of different types.

13. The apparatus of claim 12, wherein said second order of bytes is selected in response to a format signal indicative of a desired format of data output from said storage device.

14. The apparatus according to claim 13 wherein said desired format is little endian interleaved 4:

2;

2 format.

15. The apparatus according to claim 13 wherein said desired format is GIB-endian format.

16. The apparatus according to claim 12, wherein said storage device is further apportioned into a plurality of banks, said apparatus further comprising:

means for storing different ones of said plurality of bytes of the same type in similar locations of different banks during a write operation, wherein successive pairs of input bytes are alternately stored in even and odd banks of said storage device.

17. The apparatus according to claim 12, wherein said storage device is further apportioned into a plurality of bytes, and wherein said of means for storing further comprises:

means, responsive to a row address of each of said pair of bytes that are written, for storing said pairs bytes in byte locations of said storage device.

18. The apparatus according to claim 12, wherein said input bytes are received from logic in a first clock domain, and said output bytes are output to logic in a second clock domain, further comprising:

a second storage device identical to said first storage device;

means for alternatively filling said first storage device and said second storage device with input data from said first domain;

means, responsive to either of said first storage devices or said second storage devices being full, for transferring control of said full storage device to said logic in said second clock domain.

19. An apparatus for converting a plurality of received bytes, each byte having an associated type, from a first order of types to a second order of types comprising:

a storage device for storing a plurality of received bytes, where the storage location of each of said plurality of bytes is determined responsive to said type of said associated byte and responsive to a desired output order of types of said bytes;

wherein said first order of bytes includes a plurality of interleaved bytes of different types of data, and wherein said second, output order of bytes comprises a plurality of bytes of the same type of data.

20. The apparatus according to claim 19, wherein said storage device is apportioned into a plurality of sub-storage devices, each storage device for storing one bit of each type of said plurality of interleaved input bytes.

21. The method according to claim 20, further comprising:

means loading each bit of said sub-storage devices in response to an address of said sub-storage device and further in response to said type of each loaded bit.

22. The method according to claim 21, further comprising:

means for retrieving bits from said sub-storage device in response to an address of said sub-storage device and further in response to said type of said retrieved bit.