System for writing a plurality of data bits less than from the total number of bits in a data register using a single register write operation
First Claim
1. A method for writing a plurality of data register bits, less than the total number of bits in said data register, using a single register write operation, comprising the steps of:
- identifying in a portion of an address field including an address for a data register a plurality of designated register bits, less than the total number of bits in said data registers to which data is to be written;
writing data only to said identified plurality of designated register bits using a single register write operation.
1 Assignment
0 Petitions
Accused Products
Abstract
Register write circuitry (250) writes to a plurality of data register bits (276) using a single register write operation by storing both designated address bits (276) and an address field (274) for addressing a predetermined data register. The designation address bits (276) designate predetermined bits (A4,A2,A2,A1) within data register (76) to which data was to be written. Writing data (274) only to predetermined bits (276) in a register write operation uses a single write enable command (272) in a programmable and selectable manner without performing a read-modify-write or requiring the storage of a bit image of the register.
104 Citations
20 Claims
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1. A method for writing a plurality of data register bits, less than the total number of bits in said data register, using a single register write operation, comprising the steps of:
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identifying in a portion of an address field including an address for a data register a plurality of designated register bits, less than the total number of bits in said data registers to which data is to be written; writing data only to said identified plurality of designated register bits using a single register write operation. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A general purpose input/output circuit for a data packet transfer device, said general purpose input/output circuit for writing a plurality of data register bits using a single register write operation, comprising:
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identifying circuitry for identifying a plurality of designated register bits in a data register, less than the total number of bits in said data register, to which data is to be written; and writing circuitry for writing data only to said designated register bits in a register write operation using a single write command, thereby writing only to said identified plurality of designated register bits using a single register write operation. - View Dependent Claims (9, 10, 11, 12, 13, 14, 16)
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15. A personal computer environment, comprising:
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at least one peripheral employing a data packet transfer bus; a computer, said computer comprising; a host cpu comprising a PCI bus; and a PCI-interface device for providing an interface between said PCI bus and said peripheral, said PCI-interface device comprising a general purpose input/output circuit for a data packet transfer device, said general purpose input/output circuit for writing to a data register a plurality of data register bits, less than the total number of bits in said data register, using a single register write operation, comprising; storing circuitry for storing a plurality of designation bits in an address field for addressing a predetermined data register, said plurality of designation bits designating specific predetermined bits within said data register, less than the total number of bits in said data register, to which data is to be written; and writing circuitry for writing data only to said specified predetermined bits in a register write operation using a single write enable command, thereby writing only to said predetermined bits using a single register write operation. - View Dependent Claims (17, 18, 19, 20)
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Specification