Three-dimensional integrated circuit device and its manufacturing method

• US 5,998,808 A
• Filed: 06/26/1998
• Issued: 12/07/1999
• Est. Priority Date: 06/27/1997
• Status: Expired due to Term

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Matsushita, Takeshi
• Primary Examiner(s): MINTEL, WILLIAM A
• Application Number:
  US09/105,016
• Time in Patent Office: 529 Days
• Field of Search: 257/443, 257/444, 257/777, 257/306, 257/350, 257/351, 257/303, 257/232, 257/233, 257/74, 257/3
• US Class Current: 257/74
• CPC Class Codes: H01L 21/8221 Three dimensional integrated circuits stacked in different levels
• CPC Class Codes: H01L 27/0688 Integrated circuits having a three-dimensional layout
• CPC Class Codes: H01L 27/14601 Structural or functional details thereof
• CPC Class Codes: H10B 12/09 with simultaneous manufacture of the peripheral circuit region and memory cells

Abstract

A three-dimensional integrated circuit device incorporating any two-dimensional LSIs, such as CCD, MOS-type imaging device and DRAM using trench-type capacitors as its memory cell, can be manufactured economically. Each two-dimensional LSI is prepared by first forming a single-crystal silicon layer on a single-crystal silicon substrate via a porous silicon layer and thereafter forming the two-dimensional LSI on the single-crystal silicon layer. After a support substrate is bonded to the surface of the two-dimensional LSI, the two-dimensional LSI is detached from the single-crystal silicon substrate along the porous layer, and subsequently stacked on another two-dimensional LSI formed on another single-crystal silicon substrate by bonding the bottom surface of the former to the top surface of the latter. After a desired number of two-dimensional LSIs in form of thin films are stacked, the top surface of a two-dimensional LSI formed on a single-crystal silicon substrate is bonded to the bottom surface of the last stacked two-dimensional LSI to complete a three-dimensional VLSI. The thickness of the single crystal silicon layer is determined depending upon the two-dimensional LSI formed thereon.

Claims

1. A three-dimensional integrated circuit device in which a plurality of layers of integrated circuits are stacked on a substrate in which at least one of said layers of integrated circuits other than a first bottom layer adjacent said substrate is formed within a single-crystal semiconductor layer having a thickness of not less than 1 μ

m and is secured to an underlying layer.

2. The three-dimensional integrated circuit device according to claim 1 wherein a first bottom layer of integrated circuits is formed on a semiconductor substrate.

3. The three-dimensional integrated circuit device according to claim 1 wherein a top layer of integrated circuits includes an optical sensor formed therein.

4. The three-dimensional integrated circuit device according to claim 1 wherein a top layer of integrated circuits includes a solar cell.

5. The three-dimensional integrated circuit device according to claim 1 wherein at least one of said layers of integrated circuits is a wiring layer.