Power semiconductor devices having improved high frequency switching and breakdown characteristics
First Claim
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1. A UMOSFET, comprising:
- a semiconductor substrate;
a first trench in said substrate;
an insulated gate electrode in said first trench; and
a source electrode in said first trench, extending between said insulated gate electrode and a bottom of said first trench.
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Abstract
Integrated power semiconductor devices having improved high frequency switching performance, improved edge termination characteristics and reduced on-state resistance include GD-UMOSFET unit cells with upper trench-based gate electrodes and lower trench-based source electrodes. The use of the trench-based source electrode instead of a larger gate electrode reduces the gate-to-drain capacitance (CGD) of the UMOSFET and improves switching speed by reducing the amount of gate charging and discharging current that is needed during high frequency operation.
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Citations
45 Claims
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1. A UMOSFET, comprising:
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a semiconductor substrate; a first trench in said substrate; an insulated gate electrode in said first trench; and a source electrode in said first trench, extending between said insulated gate electrode and a bottom of said first trench. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A vertical power device, comprising:
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a trench in a semiconductor substrate; a source region of first conductivity type in the semiconductor substrate; an insulated first source electrode in and adjacent a bottom of said trench; a second source electrode on the substrate, electrically coupled to said source region and said insulated first source electrode; and an insulated gate electrode in and adjacent a top of said trench. - View Dependent Claims (8, 9, 10, 11, 12, 13)
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14. A field effect transistor, comprising:
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a semiconductor substrate having first and second opposing faces; a source region of first conductivity type in said substrate, adjacent the first face; a drain region of first conductivity type in said substrate, adjacent the second face; a drift region of first conductivity type in said substrate, said drift region forming a non-rectifying junction with said drain region; a base region of second conductivity type in said substrate, said base region extending between said source region and said drift region and forming first and second P-N junctions therewith, respectively; a first trench in said substrate at the first face, said first trench having a sidewall extending adjacent said drift region and said base region and a bottom extending adjacent said drain region; a gate electrode in said first trench, extending opposite said base region; a first source electrode in said first trench, said first source electrode extending between said gate electrode and the bottom of said first trench; and an electrically insulating region in said first trench, said electrically insulating region extending along the sidewall of said first trench and between said gate electrode and said first source electrode. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35)
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36. A semiconductor switching device, comprising:
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a semiconductor substrate having first and second opposing faces; a drain region of first conductivity type in said substrate, adjacent the second face; a drift region of first conductivity type in said substrate, said drift region forming a non-rectifying junction with said drain region; a trench in said substrate at the first face, said trench having first and second opposing sidewalls which extend into said drift region; a source region of first conductivity type in said substrate, said source region extending opposite the first sidewall of said trench and adjacent the first face; a base region of second conductivity type in said substrate, said base region extending between said source region and said drift region and forming first and second P-N junctions therewith, respectively; a gate electrode insulating region lining the first and second sidewalls of said trench; a gate electrode in said trench, on said gate electrode insulating region; a Schottky contact adjacent the first face, said Schottky contact forming a Schottky rectifying junction with a portion of said drift region extending opposite the second sidewall of said trench; a first source electrode disposed between said gate electrode and a bottom of said trench; and a second source electrode on the first face, ohmically contacting said source region. - View Dependent Claims (37, 38, 39, 40)
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41. A semiconductor switching device, comprising:
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a semiconductor substrate having first and second opposing faces; a drain region of first conductivity type in said substrate, adjacent the second face; a drift region of first conductivity type in said substrate, said drift region forming a non-rectifying junction with said drain region; a trench in said substrate at the first face, said trench having first and second opposing sidewalls which extend into said drift region; a source region of first conductivity type in said substrate, said source region extending opposite the first sidewall of said trench and adjacent the first face; a base region of second conductivity type in said substrate, said base region extending between said source region and said drift region and forming first and second P-N junctions therewith, respectively, which extend to the first sidewall; a gate electrode in said trench; and a gate electrode insulating region lining the first and second sidewalls of said trench, said gate electrode insulating region having a first thickness less than about 750 Å
as measured between said gate electrode and a first intersection between the first sidewall and the first P-N junction and a second thickness greater than about 1500 Å
as measured between said gate electrode and a second intersection between the first sidewall and the second P-N junction. - View Dependent Claims (42, 43, 44, 45)
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Specification