Trench-gated power MOSFET with protective diode
First Claim
1. A trench-gated vertical power MOSFET comprising:
- a semiconductor chip, said chip comprising a drain region of a first conductivity type;
a gate positioned in a trench formed in a surface of said semiconductor chip, said trench defining a two-dimensional array of cells, each of said cells being in the shape of a closed figure and being surrounded on all sides by said trench, each cell in a first group of said cells comprising a MOSFET cell and each cell in a second group of said cells comprising a diode cell, each of said MOSFET cells comprising;
a source region of said first conductivity type and a body region of a second conductivity type adjoining said source region, said body region comprising a channel region adjacent a side of said trench, said channel region being for conducting a current between said source and drain regions when said power MOSFET is turned on;
each of said diode cells comprising;
a protective diffusion of said second conductivity type, said protective diffusion forming a junction with said drain region so as to form a diode, said diode being connected in parallel with said channel region in each of said MOSFET cells, said diode cell containing no channel region adjacent a side of said trench; and
wherein said diode cells are distributed at repetitive intervals in said two-dimensional array, there being a predetermined number of MOSFET cells for every diode cell in said array, said diode cells being positioned in said array so as to limit the strength of an electric field and the formation of hot carriers in the vicinity of said trench throughout said array.
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Accused Products
Abstract
A power MOSFET includes a trenched gate which defines a plurality of MOSFET cells. A protective diffusion is created, preferably in an inactive cell, so as to form a diode that is connected in parallel with the channel region in each of the MOSFET cells. The protective diffusion, which replaces the deep central diffusion taught in U.S. Pat. No. 5,072,266, prevents impact ionization and the resulting generation of carriers near the corners of the gate trench, which can damage or rupture the gate oxide layer. Moreover, the diode can be designed to have a breakdown voltage which limits the strength of the electric field across the gate oxide layer. The elimination of a deep central diffusion permits an increase in cell density and improves the on-resistance of the MOSFET.
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Citations
27 Claims
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1. A trench-gated vertical power MOSFET comprising:
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a semiconductor chip, said chip comprising a drain region of a first conductivity type; a gate positioned in a trench formed in a surface of said semiconductor chip, said trench defining a two-dimensional array of cells, each of said cells being in the shape of a closed figure and being surrounded on all sides by said trench, each cell in a first group of said cells comprising a MOSFET cell and each cell in a second group of said cells comprising a diode cell, each of said MOSFET cells comprising; a source region of said first conductivity type and a body region of a second conductivity type adjoining said source region, said body region comprising a channel region adjacent a side of said trench, said channel region being for conducting a current between said source and drain regions when said power MOSFET is turned on; each of said diode cells comprising; a protective diffusion of said second conductivity type, said protective diffusion forming a junction with said drain region so as to form a diode, said diode being connected in parallel with said channel region in each of said MOSFET cells, said diode cell containing no channel region adjacent a side of said trench; and wherein said diode cells are distributed at repetitive intervals in said two-dimensional array, there being a predetermined number of MOSFET cells for every diode cell in said array, said diode cells being positioned in said array so as to limit the strength of an electric field and the formation of hot carriers in the vicinity of said trench throughout said array. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 23, 24, 25, 26, 27)
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13. A trench-gated power MOSFET comprising:
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a semiconductor chip comprising an epitaxial layer overlying a substrate, said substrate having a greater doping concentration than said epitaxial layer; a trench formed in said epitaxial layer and extending through said epitaxial layer and into said substrate, a gate being formed in said trench and separated by an oxide layer from said substrate, said trench defining a lattice, said lattice defining a plurality of MOSFET cells, each of said MOSFET cells comprising a source region of a first conductivity type and a body region of a second conductivity type adjoining said source region, said source region and said body region abutting a side of said trench, said body region comprising a channel region for conducting a current when said MOSFET is turned on; wherein said body region adjoins a drain region of said first conductivity type, a PN junction between said body region and said drain region forming a diode, said diode having a breakdown voltage that is less than or equal to 4 megavolts/centimeter multiplied by a thickness of said oxide layer at a bottom of said trench, said thickness being expressed in centimeters. - View Dependent Claims (14, 18, 22)
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- 15. A vertical power semiconductor switch comprising a semiconductor substrate, a first terminal of said switch being located adjacent a top side of said substrate and a second terminal of said switch being located adjacent a back side of said substrate, a trench being formed in a surface of said substrate and containing a gate, said trench being in the form of a lattice and defining a two-dimensional array comprising a plurality of MOSFET cells and a plurality of diode cells, each of said MOSFET and diode cells being in the form of a closed figure and being surrounded on all sides by said trench, each of said MOSFET cells containing a MOSFET, each of said diode cells containing a diode but no MOSFET, said diode cells being positioned at predetermined locations in said two-dimensional array such that said diode cells break down and protect said MOSFET cells from damage arising from a voltage applied between said first and second terminals when said switch is turned off.
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21. A trench gated vertical MOSFET comprising:
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a semiconductor chip, said chip comprising a drain region of a first conductivity type; a gate positioned in a trench formed in a surface of said semiconductor chip, said trench defining an array of MOSFET cells and diode cells, each of said MOSFET cells comprising; a source region of said first conductivity type; and a body region of a second conductivity type adjoining said source region, said body region comprising a channel region adjacent a side of said trench, said channel region being for conducting a current between said source and drain regions when said MOSFET is turned on; said MOSFET cells comprising a first group of cells and a second group of cells, the cells in said second group being larger than the cells in said first group, said body region in said first group being located entirely above a level of a bottom of said trench, the cells in said second group comprising a protective deep body diffusion such that a portion of said body region extends below said level of the bottom of said trench.
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Specification