Trench-gated power MOSFET with protective diode having adjustable breakdown voltage

• US 5,998,837 A
• Filed: 08/28/1997
• Issued: 12/07/1999
• Est. Priority Date: 06/02/1995
• Status: Expired due to Term

• Current Assignee: Siliconix Incorporated (Vishay Intertechnology Incorporated)
• Original Assignee: Siliconix Incorporated (Vishay Intertechnology Incorporated)
• Inventors: Williams, Richard K.
• Primary Examiner(s): Jackson, Jr., Jerome
• Application Number:
  US08/919,523
• Time in Patent Office: 831 Days
• Field of Search: 257/331, 257/341, 257/342, 257/409, 257/328
• US Class Current: 257/341
• CPC Class Codes: H01L 27/0255 using diodes as protective elements
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/0878 Impurity concentration or distribution
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/7808 the other device being a breakdown diode, e.g. Zener diode
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/7827 Vertical transistors H01L29/7802, H01L29/78642 take precedence

Abstract

A power MOSFET includes a trenched gate which defines a plurality of MOSFET cells. A protective diffusion is created, preferably in an inactive cell, so as to form a PN junction diode that is connected in parallel with the channel region in each of the MOSFET cells. The diode can be designed to have a breakdown voltage which limits the strength of the electric field across the gate oxide layer. Several techniques can be used to adjust the breakdown voltage of the PN diode and to insure that breakdown occurs away from the sidewall of the trench, where it could cause impact ionization which could damage the gate oxide layer. According to one technique, a region of the epitaxial layer beneath the PN junction can be doped more heavily than the background level in the epitaxial layer to reduce the breakdown voltage of the PN junction diode. Also the radius of curvature of the PN junction and the separation between the protective diffusion and the heavily doped substrate can be used for this purpose. In other embodiments a zener diode is formed in the diode cell, located either at the surface of the epitaxial layer or buried in the diode cell.

Claims

1. A trench-gated vertical power MOSFET comprising:

a substrate of a first conductivity type

an epitaxial layer formed on an surface of said substrate, said epitaxial layer having a background dopant level of said first conductivity type, said substrate and a portion of said epitaxial layer doped to said first conductivity type forming a drain region of said MOSFET;

a gate positioned in a trench formed in a surface of said epitaxial layer, said trench defining a plurality of MOSFET cells and at least one diode cell, each of said MOSFET cells comprising;

a source region of said first conductivity type and a body region of a second conductivity type adjoining said source region, said body region comprising a channel region adjacent a side of said trench, said channel region being for conducting a current between said source and drain regions when said power MOSFET is turned on;

said at least one diode cell comprising;

a protective diffusion of said second conductivity type, said protective diffusion forming a PN junction with said drain region so as to form a diode, said diode being connected in parallel with said channel region in each of said MOSFET cells, said diode cell containing no channel region; and

a breakdown voltage control region formed in said portion of said epitaxial layer doped to said first conductivity, said breakdown voltage control region having a dopant concentration greater than said background dopant level.

2. The MOSFET of claim 1 wherein said breakdown voltage control region abuts said PN junction.

3. The MOSFET of claim 1 wherein the peak dopant concentration in said breakdown voltage control region is from 10% to 100% greater than said background level.

4. The MOSFET of claim 1 wherein said breakdown voltage control region is formed by implanting ions of said first conductivity type through a surface of said epitaxial layer.

5. The MOSFET of claim 1 wherein said breakdown voltage control region is formed by updiffusing a ions of said first conductivity type from an interface of said epitaxial layer and said substrate.

6. The MOSFET of claim 1 wherein said protective diffusion is shorted to the source region of each of said MOSFET cells.

7. The MOSFET of claim 1 comprising a plurality of said diode cells, said diode cells being positioned at regular intervals in a lattice formed by said gate.

8. The MOSFET of claim 7 wherein there are a predetermined number of said MOSFET cells for every diode cell.

9. A trench-gated vertical power MOSFET comprising:

a substrate of a first conductivity type

an epitaxial layer formed on an surface of said substrate, said epitaxial layer having a background dopant level of said first conductivity type, said substrate and a portion of said epitaxial layer doped to said first conductivity type forming a drain region of said MOSFET;

a gate positioned in a trench formed in a surface of said epitaxial layer, said trench defining a plurality of MOSFET cells and at least one diode cell, each of said MOSFET cells comprising;

a source region of said first conductivity type and a body region of a second conductivity type adjoining said source region, said body region comprising a channel region adjacent a side of said trench, said channel region being for conducting a current between said source and drain regions when said power MOSFET is turned on;

said at least one diode cell comprising a first region of said first conductivity type and a second region of said second conductivity type, said second region being laterally disposed from said first region and being located between said first region and a sidewall of said trench, said first and second regions being comprised in a zener diode located near a surface of said epitaxial layer, said zener diode being connected in parallel with said channel.

10. The MOSFET of claim 9 wherein said first region abuts said second region.

11. The MOSFET of claim 9 wherein said diode cell further comprises a third region of said second conductivity for shaping an electric field within said diode cell.

14. The MOSFET of claim 9 wherein said third region is doped to substantially the same dopant concentration as said body region.

12. A trench-gated vertical power MOSFET comprising:

a substrate of a first conductivity type

an epitaxial layer formed on an surface of said substrate, said epitaxial layer having a background dopant level of said first conductivity type, said substrate and a portion of said epitaxial layer doped to said first conductivity type forming a drain region of said MOSFET;

a gate positioned in a trench formed in a surface of said epitaxial layer, said trench defining a plurality of MOSFET cells and at least one diode cell, each of said MOSFET cells comprising;

a source region of said first conductivity type and a body region of a second conductivity type adjoining said source region, said body region comprising a channel region adjacent a side of said trench, said channel region being for conducting a current between said source and drain regions when said power MOSFET is turned on;

said at least one diode cell comprising a first region of said first conductivity type, a second region of said second conductivity type, and a third region of said second conductivity type, said first region adjoining a top surface of said epitaxial layer, said second region being located below said first region and being separated from a sidewall of said trench, said third region adjoining said second region, said second region being doped to a dopant concentration greater than a dopant concentration of said third region, third region being electrically connected to said body region.

13. The MOSFET of claim 12 wherein said first region abuts said second region.