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Clock recovery circuit

  • US 6,002,279 A
  • Filed: 10/24/1997
  • Issued: 12/14/1999
  • Est. Priority Date: 10/24/1997
  • Status: Expired due to Fees
First Claim
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1. A clock recover circuit comprising:

  • a voltage controlled oscillator constructed to generate, in accordance with a reference frequency, a plurality of clock signals, each of the plurality of clock signals having a different phase and the plurality of clock signals having a common frequency;

    a phase interpolator constructed to generate a recovered clock signal having the common frequency and a selected phase, the selected phase being interpolated from at least two of the plurality of clock signals; and

    means for causing the selected phase of the recovered clock signal to be advanced when the selected phase of the recovered clock signal is behind a phase of a data signal and for causing the selected phase of the recovered clock signal to be hindered when the selected phase of the recovered clock signal is ahead of the phase of the data signal, the means including;

    a plurality of non-linear digital to analog converters that are constructed to cause the phase interpolator to change the selected phase of the recovered clock signal.

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