Integrated video and memory controller with data processing and graphical processing capabilities
First Claim
1. A computer system including a memory controller which performs memory control and video functions, comprising:
- a CPU;
a memory controller coupled to said CPU which performs system memory control and video functions, wherein the memory controller includes one or more video ports for providing video signals;
system memory coupled to said memory controller, wherein said system memory stores video data and non-video data; and
a display device coupled to said one or more video ports of said memory controller, wherein said memory controller accesses said video data in said system memory and provides video signals through said one or more video ports to said display device;
wherein said memory controller receives non-video data from said CPU and stores said non-video data in said system memory and wherein said memory controller transfers said non-video data from said system memory to said CPU on CPU request;
wherein said memory controller includes a compression/decompression engine, wherein said compression/decompression engine is operable to compress received data and store said compressed data in said system memory, and wherein said compression/decompression engine is operable to receive data from said system memory and decompress said data received from said system memory; and
wherein said compression/decompression engine is operable to compress/decompress both said video data and said non-video data being transferred to/from said system memory.
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Accused Products
Abstract
An integrated memory controller (IMC) which incorporates novel memory, graphics, and audio processing capabilities in a single logical unit. The IMC includes numerous significant advances which provide greatly increased performance over prior art systems. The integrated memory controller (IMC) includes one or more symmetric memory ports for connecting to system memory. The IMC also includes video outputs, preferably RGB (red, green, blue) outputs as well as horizontal and vertical synchronization signal outputs, to directly drive the video display monitor. The IMC transfers data between the system bus and system memory and also transfers data between the system memory and the video display output, thereby eliminating the need for a separate graphics subsystem. The IMC also improves overall system performance and response using main system memory for graphical information and storage. The IMC system level architecture reduces data bandwidth requirements for graphical display data since the host CPU is not required to move data between main memory and the graphics subsystem as in conventional computers, but rather the graphical data resides in the same subsystem as the main memory. Therefore the host CPU or DMA master is not limited by the available bus bandwidth. The IMC includes compression and decompression engines for compressing and decompressing data within the system. The IMC also includes a novel pointer-based display list architecture which includes windows workspace areas spaces which define the format of the data and the data type to read or written.
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Citations
26 Claims
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1. A computer system including a memory controller which performs memory control and video functions, comprising:
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a CPU; a memory controller coupled to said CPU which performs system memory control and video functions, wherein the memory controller includes one or more video ports for providing video signals; system memory coupled to said memory controller, wherein said system memory stores video data and non-video data; and a display device coupled to said one or more video ports of said memory controller, wherein said memory controller accesses said video data in said system memory and provides video signals through said one or more video ports to said display device; wherein said memory controller receives non-video data from said CPU and stores said non-video data in said system memory and wherein said memory controller transfers said non-video data from said system memory to said CPU on CPU request; wherein said memory controller includes a compression/decompression engine, wherein said compression/decompression engine is operable to compress received data and store said compressed data in said system memory, and wherein said compression/decompression engine is operable to receive data from said system memory and decompress said data received from said system memory; and wherein said compression/decompression engine is operable to compress/decompress both said video data and said non-video data being transferred to/from said system memory. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. A memory controller for performing memory control and video functions, comprising:
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one or more memory control units adapted for coupling to a system memory for controlling functions of the system memory; a graphics engine coupled to the one or more memory control units for performing graphics operations on data; and one or more video ports coupled to the graphics engine and coupled to the one or more memory control units for providing video signals to a display device; and a compression/decompression engine, wherein said compression/decompression engine is operable to compress received data and store said compressed data in said system memory, and wherein said compression/decompression engine is operable to receive data from said system memory and decompress said data received from said system memory; and wherein said compression/decompression engine is operable to compress/decompress both said video data and said non-video data being transferred to/from said system memory. - View Dependent Claims (17, 18, 19, 20, 21, 22, 23, 24, 25, 26)
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Specification