Method and apparatus for reducing flickers in video signal conversions

• US 6,002,442 A
• Filed: 04/01/1997
• Issued: 12/14/1999
• Est. Priority Date: 04/01/1997
• Status: Expired due to Fees

• Current Assignee: Altek International, Inc.
• Original Assignee: AITech International Corporation
• Inventors: Chen, Huang-Jen, Li, Jan-Kwei Jack
• Primary Examiner(s): Lee, Michael H.
• Assistant Examiner(s): DESIR, JEAN WICEL
• Application Number:
  US08/831,162
• Time in Patent Office: 987 Days
• Field of Search: 348/447, 348/441, 348/446, 348/448, 348/910, 348/443, 348/459, 348/458, 345/154
• US Class Current: 348/447
• CPC Class Codes: H04N 7/012 Conversion between an interlaced and a progressive signal for graphics images G09G2310/0229
• CPC Class Codes: H04N 7/0135 involving interpolation processes interpolation-based image scaling G06T3/4007; interpolation for video coding H04N19/587, H04N19/59
• CPC Class Codes: Y10S 348/91 Flicker reduction

Abstract

The present invention discloses a system for adaptively reducing flickers in converting non-interlaced video signals to interlaced video signals. To preserve the original image quality in the non-interlaced video signals, the disclosed system examines the pixel values in at least two adjacent lines to decide if a reduction process should be turned on. If there is a need, the reduction process further examines the difference in the pixels from the adjacent lines to determine how to adjust a corresponding output to eliminate flickers in the resultant converted video signals. The adjusting means is based on an adjusting factor or the calculated difference between pixels which is further used in a function to eventually produce a converted interlaced signal with minimum visual errors.

Claims

1. A method for reducing flickers in transforming non-interlaced video signals to interlaced video signals, each of the video signals comprising a plurality of lines of signals, each of the line signal comprising pixels, the method comprising the steps of:

(a) receiving the pixel image in a memory;

(b) outputting the pixels successively and line by line;

(c) shifting the pixels received from step (b) into a first FIFO line buffer;

(d) receiving a kth pixel of a (n+1 )th line signal from the first FIFO line buffer as a reference pixel;

(e) receiving a kth pixel of the nth line from step (b) as a determining pixel;

(f) comparing the reference pixel with the determining pixel;

(g) detecting a first dissimilarity value between the reference pixel and the determining pixel in accordance with the comparison in step (f);

(h) employing a first adjustable factor;

(i) adjusting the first dissimilarity value with the first adjustable factor;

(j) adding the adjusted first dissimilarity value obtained in step (i) to the determining pixel; and

(k) outputting a first new determining pixel resulting from step (j).

2. The method as recited in claim 1 further comprising the steps of:

(l) shifting the pixels received from step (c) into a second FIFO line buffer;

(m) receiving a kth pixel of a (n-1)th line signal from the second FIFO line buffer as an advancing pixel;

(n) comparing the advancing pixel with the determining pixel;

(o) detecting a second dissimilarity value between the advancing pixel and the determining pixel in accordance with the comparison in step (n);

(p) employing a second adjustable factor;

(q) adjusting the second dissimilarity value with the second adjustable factor;

(r) adding the adjusted second dissimilarity value obtained in step (q) to the determining pixel; and

(s) outputting a second new determining pixel resulting from step (r).

3. The method as recited in claim 2, wherein step (g) comprises the steps of:

subtracting the reference pixel from the determining pixel;

obtaining a first absolute value in accordance with the subtraction in the step of subtracting the reference pixel from the determining pixel; and

producing the first dissimilarity value if the first absolute value is greater than a threshold.

4. The method as recited in claim 3, wherein step (n) comprises the steps of:

subtracting the advancing pixel from the determining pixel;

obtaining a second absolute value in accordance with the subtraction in the step of subtracting the advancing pixel from the determining pixel; and

producing the second dissimilarity value if the second absolute value is greater than the threshold.

5. The method as recited in claim 4 further comprising the steps of:

accumulating the first new determining pixel and the second new determining pixel; and

adding to the determining pixel the accumulated value in accordance with the step of accumulating the first new determining pixel and the second new determining pixel so as to produce a new kth pixel of the nth line.

6. The method as recited in claim 2, wherein step (i) comprises:

receiving the first dissimilarity value; and

multiplying the first dissimilarity value with the first adjustable factor, wherein the first adjustable factor is a function of the first dissimilarity value.

7. The method as recited in claim 6, wherein step (p) comprises:

receiving the second dissimilarity value; and

multiplying the second dissimilarity value with the second adjustable factor, wherein the second adjustable factor is a function of the second dissimilarity value.

8. A method for reducing flickers in transforming non-interlaced video signals to interlaced video signals, each of the video signals comprising a plurality of lines of signals, each of the line signal comprising pixels, the method comprising the steps of:

(a) receiving the pixel image in a memory;

(b) outputting the pixels successively and line by line;

(c) shifting the pixels received from step (b) successively into 2N line buffers, each of the 2N line buffers having an input and an output and being connected in series, each of the 2N buffers being defined as ith line buffer, where i is defined in a range from 1 to N, and each of the 2N buffers receiving the pixels shifted out from a predecessor thereof;

(d) receiving a kth pixel of a nth line, as a current pixel, from the Nth line buffers in accordance with step (c);

(e) receiving a kth pixel of a (n+1)th line, as an advancing pixel, from the (N+i)th line buffer in accordance with step (c);

(f) receiving a kth pixel of a (n-1)th line, as a previous pixel, from the (N-i)th line buffer in accordance with step (c);

(g) comparing the previous pixel with the current pixel;

(h) comparing the current pixel with the next pixel;

(i) detecting a first dissimilarity value between the previous pixel and the current pixel in accordance with the comparison in step (g);

(j) detecting a second dissimilarity value between the current pixel and the next pixel in accordance with the comparison in step (i);

(k) employing a first adjustable factor, wherein the first adjustable factor is a first function of the first dissimilarity value;

(l) employing a second adjustable factor, wherein the second adjustable factor is a second function of the second dissimilarity value;

(m) adjusting the first dissimilarity value with the first adjustable factor;

(n) adjusting the second dissimilarity value with the second adjustable factor;

(o) repeating step (d) to (n) N times, thereby there N pairs of the first and second dissimilarity values are generated;

(p) summarizing the adjusted first dissimilarity values and the adjusted second dissimilarity values obtained in step (o) and the pixel received from the Nth buffer line; and

(q) outputting a new kth pixel resulting from step (p).

9. The method as recited in claim 8, wherein step (g) comprises the steps of:

subtracting the previous pixel from the current pixel;

obtaining a first absolute value in accordance with the subtraction in the step of subtracting the previous pixel from the current pixel; and

producing the first dissimilarity value if the first absolute value is greater than a threshold.

10. The method as recited in claim 9, wherein step (h) comprises the steps of:

subtracting the next pixel from the current pixel;

obtaining a second absolute value in accordance with the subtraction in the step of subtracting the next pixel from the current pixel; and

producing the second dissimilarity value if the second absolute value is greater than the threshold.

11. An apparatus for reducing flickers in transforming non-interlaced video signals to interlaced video signals, each of the video signals comprising a plurality of lines of signals, each of the line signal comprising pixels, the apparatus comprising:

a first line buffer and a second line buffer coupled in series, the first line buffer receiving the non-interlaced video signals comprising lines of signals;

each of the signals comprising N pixels, the first and the second line buffers each comprising N memory cells, each of the memory cells for one of the pixels, such that the first line buffer outputs one-line delayed non-interlaced video signals and the second line buffer outputs two-line delayed non-interlaced video signals;

a first and a second comparing circuits, each having a first input and a second input, the first and the second inputs of the first comparing circuit receiving the non-interlaced video signals and the one-line delayed non-interlaced video signals from the first line buffer, the first comparing circuit outputting a first similarity value by comparing two kth pixels, respectively, in the non-interlaced video signals and the one-line delayed non-interlaced video signals, the first and the second inputs of the second comparing circuit receiving the one-line non-interlaced video signals from the first line buffer and the two-line delayed non-interlaced video signals from the second line buffer, the second comparing circuit outputting a second similarity value by comparing two kth pixels, respectively in the one-line non-interlaced video signals and the two-line delayed non-interlaced video signals; and

a first and second multiplying circuits, each respectively coupled to the first and second comparing circuits, multiplying, respectively, the first similarity value by a first adjustable factor to produce an adjusted first similarity value and the second similarity value by a second adjustable factor to produce an adjusted second similarity value.

12. The apparatus as recited in claim 11, further comprising:

an adding circuit, coupled to the first and second multiplying circuits respectively, to add both of the adjusted first and second similarity values to the kth pixel of the non-interlaced video signals.

13. The apparatus as recited in claim 12, wherein the two kth pixels, respectively, in the non-interlaced video signals and the one-line delayed non-interlaced video signals are a line of signals apart;

and wherein the two kth pixels, respectively, in the one-line non-interlaced video signals and the two-line delayed non-interlaced video signals are a line of signals apart.

14. The apparatus as recited in claim 11, wherein the first similarity value is a first difference between the two kth pixels, respectively, in the non-interlaced video signals and the one-line delayed non-interlaced video signals;

and wherein the second similarity value is a second difference between the two kth pixels, respectively, in the one-line non-interlaced video signals and the two-line delayed non-interlaced video signals.

15. The apparatus as recited in claim 14, wherein each of the first adjustable factor and the second adjustable factor is a fractional number so that both of the first similarity value and the second similarity value are reduced.

16. The apparatus as recited in claim 14, wherein the first adjustable factor and the second adjustable factor are a function of the first difference and the second difference, respectively.