Long-haul PCI-to-PCI bridge

• US 6,003,105 A
• Filed: 11/03/1997
• Issued: 12/14/1999
• Est. Priority Date: 11/21/1996
• Status: Expired due to Fees

• Current Assignee: Hewlett-Packard Company (HP Inc.)
• Original Assignee: Hewlett-Packard Company (HP Inc.)
• Inventors: Moiroux, Jean-Paul, Vicard, Dominique, Thoulon, Pierre-Yves
• Primary Examiner(s): Sheikh, Ayaz R.
• Assistant Examiner(s): Vo, Tim T.
• Application Number:
  US08/963,536
• Time in Patent Office: 771 Days
• Field of Search: 395/308, 395/309, 395/306, 395/281, 395/287, 395/280, 395/733, 395/293, 395/821, 710/128, 710/129, 710/126, 710/101, 710/107, 710/100, 710/260, 710/113, 710/1
• US Class Current: 710/314
• CPC Class Codes: G06F 13/4045 where the bus bridge performs an extender function

Abstract

A long-haul PCI bridge pier is provided that comprises a PCI interface for connection to a PCI bus, a high speed link interface for connection to a high speed link, and a PCI adapter operative to transform PCI information received at said PCI interface into high speed information to be transmitted through the high speed interface, and operative to transform high speed information received at said high speed interface into PCI information to be transmitted through the PCI interface. The PCI bridge pier permits remote connection of a PCI bus with a high speed link such as a serial link. Two such PCI bridge piers, in combination with a high speed link may be used for implementing a long haul PCI-to-PCI bridge.

Claims

1. A long-haul PCI bridge pier comprising a PCI interface for connection to a PCI bus, a high speed link interface for connection to a high speed link, and a PCI adapter operative to transform PCI information received at said PCI interface into high speed information to be transmitted through the high speed link interface, and operative to transform high speed information received at said high speed link interface into PCI information to be transmitted through the PCI interface, said PCI bridge pier further comprising a non-PCI interface, and a non-PCI adapter operative to transform information received at said non-PCI interface into high speed information to be transmitted through the high speed link interface, and operative to transform high speed information received at said high speed link interface into information to be transmitted through the non-PCI interface.

2. A long-haul PCI bridge pier according to claim 1, wherein the high speed link interface is adapted for connection to a serial link.

3. A long-haul PCI bridge pier according to claim 1, wherein the PCI interface comprises a master interface and a slave interface, and wherein the PCI adapter comprises a master buffer connected to the master interface and a slave buffer connected to the slave interface.

4. A PCI-to-PCI bridge comprising a first and a second long-haul PCI bridge pier according to claim 1, and a high speed link, one end of which is connected to a PCI interface of the first long-haul PCI bridge pier, and another end of which is connected to a PCI interface of the second long-haul PCI bridge pier.

5. A long haul connection for a remote PCI bus in a computer, comprising a long-haul PCI bridge pier according to claim 1, and a high speed link, one end of which is connected to a PCI interface of the long-haul PCI bridge pier, and another end of which is connected to a I/O controller of the computer.

6. A long-haul PCI bridge pier according to claim 3, wherein the master buffer comprises an inbound write data queue for receiving write data for a PCI write transaction received on the high speed link interface, an inbound transaction queue for receiving transaction data for a PCI write transaction received on the high speed link interface, and an outbound read data queue for receiving read data from the master interface in answer to a PCI read transaction received on the high speed link interface.

7. A long-haul PCI bridge pier according to claim 3, wherein the slave buffer comprises an outbound write data queue for receiving write data for a PCI write transaction received at the slave interface, an outbound transaction queue for receiving transaction data for a PCI write transaction received at the slave interface, and an inbound read data queue for receiving read data from the high speed link interface in answer to a PCI read transaction received at the slave interface.

8. A multiple processor system, comprising at least two machines each comprising a PCI bus, and at least one PCI-to-PCI bridge according to claim 4 for connecting the PCI buses of the at least two machines.

9. A PCI-to-PCI bridge according to claim 4, wherein the high speed link is a physical point-to-point connection.

10. A personal computer comprising two mechanical enclosures, each comprising a PCI bus and at least one PCI-TO-PCI bridge according to claim 8, for connecting the PCI buses of the two enclosures.

11. A personal computer comprising two mechanical enclosures, each comprising a PCI bus and at least one PCI-TO-PCI bridge according to claim 8, for connecting the PCI buses of the two enclosures.

12. PCI bridge apparatus comprising;

a PCI interface for connection to a PCI bus, the PCI interface comprising a master interface and a slave interface;

a high speed link interface adapted for connection to a high speed serial link;

a PCI adapter operative to transform PCI information received at said PCI interface into high speed information to be transmitted through the high speed link interface, and operative to transform high speed information received at said high speed link interface into PCI information to be transmitted through the PCI interface, the PCI adapter comprising a master buffer connected to the master interface, the master buffer having an inbound write data queue for receiving write data for a PCI write transaction received on the high speed link interface, an inbound transaction queue for receiving transaction data for a PCI write transaction received on the high speed interface, and an outbound read data queue for receiving read data from the master interface in answer to a PCI read transaction received on the high speed link interface, the PCI adapter further comprising a slave buffer connected to the slave interface, the slave buffer having an outbound write data queue for receiving write data for a PCI write transaction received at the slave interface, an outbound transaction queue for receiving transaction data for a PCI write transaction received at the slave interface, and an inbound read data queue for receiving read data from the high speed interface in answer to a PCI read transaction received at the slave interface, said PCI adapter further comprising a non-PCI interface, and a non-PCI adapter operative to transform information received at said non-PCI interface into high speed information to be transmitted through the high speed link interface, and operative to transform high speed information received at said high speed link interface into information to be transmitted through the non-PCI interface.

13. A PCI-to-PCI bridge comprising first and second PCI bridge apparatus, each according to claim 12, and a high speed serial link, one end of which is connected to a PCI interface of the first PCI bridge apparatus, and another end of which is connected to a PCI interface of the second PCI bridge apparatus.

14. A long haul connection for a remote PCI bus in a computer, comprising PCI bridge apparatus according to claim 12, and a high speed serial link, one end of which is connected to a PCI interface of the PCI bridge apparatus, and another end of which is connected to a I/O controller of the computer.

15. A multiple processor system, comprising at least two machines each comprising a PCI bus, and at least one PCI-to-PCI bridge according to claim 13 for connecting the PCI buses of the at least two machines.

16. A PCI-to-PCI bridge according to claim 13, wherein the high speed link is a physical point-to-point connection.