Voltage application driving method

• US 6,005,646 A
• Filed: 12/22/1997
• Issued: 12/21/1999
• Est. Priority Date: 01/20/1997
• Status: Expired due to Term

• Current Assignee: InnoLux Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Nakamura, Hajime, Noguchi, Michikazu
• Primary Examiner(s): Sikes, William L.
• Assistant Examiner(s): Duong, Tai V.
• Application Number:
  US08/995,443
• Time in Patent Office: 729 Days
• Field of Search: 349/143, 349/33, 349/34, 349/177, 349/191, 345/92, 345/94, 345/95
• US Class Current: 349/33
• CPC Class Codes: G02F 1/1395 Optically compensated birefringence [OCB]- cells or PI- cells
• CPC Class Codes: G09G 2300/0491 Use of a bi-refringent liquid crystal, optically controlled bi-refringence [OCB] with bend and splay states, or electrically controlled bi-refringence [ECB] for controlling the color
• CPC Class Codes: G09G 2310/0245 Clearing or presetting the whole screen independently of waveforms, e.g. on power-on G09G2310/063 takes precedence
• CPC Class Codes: G09G 2330/026 Arrangements or methods related to booting a display
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence

Abstract

A voltage application driving method is provided for quickly changing the alignment of a liquid crystal layer in thin film transistor liquid crystal displays (TFT/LCD) to a bend alignment. In this driving method, a potential difference larger than 10 V is continuously or intermittently provided between the signal electrode of the liquid crystal cells, and the counter electrode of the display while maintaining the potential difference between the gate electrode and the signal electrode of the cells larger than 10 V. The on-time over which an intermittent potential difference is provided between the signal electrode and the counter electrode is preferably equal to or longer than the time period for part of the liquid crystal layer to effectively begin a transition to the second-stage splay alignment, and the off-time over which no potential difference is provided between the signal electrode and the counter electrode is equal to or longer than the time period necessary for the liquid crystal region of of the second-stage splay alignment to return to its state before the voltage application.

Claims

1. In a liquid crystal display comprising a first substrate on which display electrodes each connected to a thin film transistor with gate and signal-electrodes are formed in a matrix, a second substrate opposed to said first substrate and having a counter electrode formed thereon, a liquid crystal layer positioned between said first substrate and said second substrate, a first voltage applying circuit for applying a voltage to the gate electrode of said thin film transistor, and a second voltage applying circuit for applying a voltage, between a signal electrode of said thin film transistor and said counter electrode and through the thin film transistor to the display electrode connected to the thin film transistor, a voltage application driving method for quickly changing the alignment of said liquid crystal layer to a bend alignment through a first stage splay alignment and a slower second stage splay alignment, the method comprising:

providing a potential difference larger than 10 V between said signal electrode and said counter electrode while maintaining the potential difference between said gate electrode and said signal electrode larger than 10 V, providing the potential difference between said signal electrode and said counter electrode during the time period over which the potential difference is maintained between said gate electrode and said signal electrode so that said liquid crystal layer assumes the bend alignment.

2. A voltage application driving method according to claim 1, including the step of providing the potential difference between said signal electrode and said counter electrode in several pulses within the time period over which the potential difference is maintained between said gate electrode and said signal electrode.

3. A voltage application driving method according to claim 2 including the step of providing the potential difference between said signal electrode and said counter electrode for 30 to 70% of the time period over which a potential difference is maintained between said gate electrode and said signal electrode.

4. A voltage application driving method according to claim 2 including the step of applying 0±

1 V between said signal electrode and said counter electrode for the time other than the time periods over which a potential difference is applied between said signal electrode and said counter electrode.

5. In a liquid crystal display comprising a first substrate on which display electrodes each connected to a thin film transistor with gate and signal electrodes are formed in a matrix, a second substrate opposed to said first substrate and having a counter electrode formed thereon, a liquid crystal layer positioned between said first substrate and said second substrate, a first voltage applying circuit for applying a voltage to the gate electrode of said thin film transistor, and a second voltage applying circuit for applying a voltage, between a signal electrode of said thin film transistor and said counter electrode and through the thin film transistor to the display electrode connected to the thin film transistor, a voltage application driving method for quickly changing the alignment of said liquid crystal layer to a bend alignment through a first stage splay alignment and a slower second stage splay alignment, the method comprising:

intermittently providing a potential difference larger than 10 V between said signal electrode and said counter electrode while maintaining a potential difference between said gate electrode and said signal electrode larger than 10 V, the time period over which a potential difference is provided between said signal electrode and said counter electrode being equal or longer than the time period for part of said liquid crystal layer to effectively begin a transition to said second-stage splay alignment, and the time period over which no potential difference is applied between said signal electrode and said counter electrode being equal to or longer than the time period necessary for the liquid crystal region of said second-stage splay alignment to return to the state before the voltage application.

6. In a liquid crystal display comprising a first substrate on which display electrodes each connected to a thin film transistor with gate and signal electrodes are formed in a matrix, a second substrate opposed to said first substrate and having a counter electrode formed thereon, a liquid crystal layer positioned between said first substrate and said second substrate, a first voltage applying circuit for applying a voltage to the gate electrode of said thin film transistor, and a second voltage applying circuit for applying a voltage, between a signal electrode of said thin film transistor and said counter electrode and through the thin film transistor to the display electrode connected to the thin film transistor, a voltage application driving method for quickly changing the alignment of said liquid crystal layer to a bend alignment through a first stage splay alignment and a slower second stage splay alignment, the method comprising:

intermittently providing a potential difference between said signal electrode and said counter electrode while maintaining a potential difference between said gate electrode and said signal electrode large enough to insure enough conduction through the thin film transistor to effect a change to bend alignment from the first stage splay alignment during a first pulse of the potential difference where the time period over which the first pulse of potential difference is provided between said signal electrode and said counter electrode is equal or longer than the time period for part of said liquid crystal layer to effectively begin a transition to said second-stage splay alignment, and the time period over which no potential difference is applied between said signal electrode and said counter electrode being equal to or longer than the time period necessary for the liquid crystal region of said second-stage splay alignment to return to the state before the voltage application so that transition to bend alignment occurs from the first stage splay alignment in a succeeding pulse of the potential difference.

7. A voltage application driving method according to claim 6, including the step of providing the potential difference between said signal electrode and said counter electrode in more than two pulses within the time period over which the potential difference is maintained between said gate electrode and said signal electrode.

8. A voltage application driving method according to claim 7, including the step of providing the pulses of potential difference between said signal electrode and said counter electrode with a duty cycle of 30 to 70% during the time period over which a potential difference is maintained between said gate electrode and said signal electrode.

9. A voltage application driving method according to claim 8, including the step of applying a voltage of no more than ±

1 V between said signal electrode and said counter electrode between the times which the pulses of potential difference are applied between said signal electrode and said counter electrode.

10. In a liquid crystal display comprising a first substrate on which display electrodes each connected to a thin film transistor are formed in a matrix, a second substrate opposed to said first substrate and having a counter electrode formed thereon, a liquid crystal layer positioned between said first substrate and said second substrate, a first voltage applying circuit for applying a voltage to the gate electrode of said thin film transistor, and a second voltage applying circuit for applying a voltage, between a signal electrode of said thin film transistor and said counter electrode and through the thin film transistor to the display electrode connected to the thin film transistor, a voltage application driving method for changing the alignment of said liquid crystal layer from a homogeneous crystal alignment state to a bend alignment state through a first stage splay alignment and a slower second stage splay alignment, the method comprising:

maintaining a potential difference between said gate electrode and said signal electrode during a transition from the homogeneous crystal alignment state to the bend alignment state, providing a potential difference between said signal electrode and said counter electrode during the time period over which the potential difference is maintained between said gate electrode and said signal electrode both said potential differences at high levels that restrain changing of the crystal layer from the first stage splay alignment to minimize the portion of the transition to bend alignment that occurs during the second stage splay alignment so that said liquid crystal layer quickly assumes the bend alignment state.

11. A voltage application driving method according to claim 10, including the step of providing the potential difference between said signal electrode and said counter electrode in more than two pulses within the time period over which the potential difference is maintained between said gate electrode and said signal electrode.

12. A voltage application driving method according to claim 11, including the step of providing the pulses of potential difference between said signal electrode and said counter electrode for 30 to 70% of the time period over which a potential difference is maintained between said gate electrode and said signal electrode.

13. A voltage application driving method according to claim 12, including the step of applying 0±

1 V between said signal electrode and said counter electrode for the time other than the time periods over which a potential difference is applied between said signal electrode and said counter electrode.