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Nonvolatile configuration cells and cell arrays

  • US 6,005,806 A
  • Filed: 09/16/1996
  • Issued: 12/21/1999
  • Est. Priority Date: 03/14/1996
  • Status: Expired due to Term
First Claim
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1. An integrated circuit comprising:

  • a first plurality of conductors extending in a first direction for conducting logic signals;

    a second plurality of conductors in a second direction, transverse to said first direction, for conducting logic signals; and

    a plurality of programmable intersections for programmably coupling said first plurality of conductors to said second plurality of conductors, wherein a programmable intersection comprises;

    an output node for providing approximately full-rail output voltages;

    a pull-down resistor, coupled between a first voltage source at a first voltage level and said output node; and

    a nonvolatile memory element, coupled between said output node and a second voltage source at a second voltage level, wherein said second voltage level is above said first voltage level, said nonvolatile memory element stores data and retains said data, even when power is removed from said programmable logic device.

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