Transistor and method of manufacturing the same
First Claim
1. A transistor comprising:
- a first conductivity type first semiconductor layer defining a first major surface and a second major surface;
a second conductivity type second semiconductor layer formed in said first major surface of said first semiconductor layer;
a first conductivity type third semiconductor layer selectively formed in a surface of said second semiconductor layer;
a first conductivity type fourth semiconductor layer selectively formed in said surface of said second semiconductor layer, in isolation from said third semiconductor layer;
an insulating film formed on a region held between said third and fourth semiconductor layers in an exposed surface of said second semiconductor layer;
a first control electrode (8) formed on said insulating film;
a second control electrode formed on a region in said exposed surface of said semiconductor layer different from said region on which said insulating film is formed;
a first main electrode formed on a surface of said third semiconductor layer; and
a second main electrode being formed on said second major surface of said first semiconductor layer.
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Accused Products
Abstract
A transistor and a fabrication method thereof, and in particular, a technique for compatibly improving reduction of an ON-state voltage and reduction of a turn-off time. First and second emitter layers are selectively formed in isolation from each other on a surface of a base layer 3, and a channel region 6 opposed to a gate electrode 8 through a gate insulating film is formed therebetween. In an ON state, a base current Ib is supplied from a base electrode, while a prescribed gate voltage is applied to the gate electrode. The first and second emitter layers couple with each other and function as a single emitter layer, whereby the ON-state voltage becomes a low value of about the same degree as a bipolar transistor. When bringing a device into an OFF state, supply of the base current Ib is stopped while a zero (or negative) voltage is applied to the gate electrode. Consequently, coupling between the first emitter layer and the second emitter layer is canceled, whereby a second collector current Ic2 which is a component of a main current passing through the second emitter layer rapidly attenuates similarly to a MOS.
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Citations
20 Claims
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1. A transistor comprising:
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a first conductivity type first semiconductor layer defining a first major surface and a second major surface; a second conductivity type second semiconductor layer formed in said first major surface of said first semiconductor layer; a first conductivity type third semiconductor layer selectively formed in a surface of said second semiconductor layer; a first conductivity type fourth semiconductor layer selectively formed in said surface of said second semiconductor layer, in isolation from said third semiconductor layer; an insulating film formed on a region held between said third and fourth semiconductor layers in an exposed surface of said second semiconductor layer; a first control electrode (8) formed on said insulating film; a second control electrode formed on a region in said exposed surface of said semiconductor layer different from said region on which said insulating film is formed; a first main electrode formed on a surface of said third semiconductor layer; and a second main electrode being formed on said second major surface of said first semiconductor layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A method of fabricating a transistor comprising the following steps (a) to (i);
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(a) a step of preparing a first conductivity type semiconductor substrate as a first semiconductor layer, said semiconductor substrate defining a first major surface and a second major surface; (b) a step of forming a second conductivity type second semiconductor layer by introducing a second conductivity type impurity into said first major surface of said first semiconductor layer; (c) a step of selectively forming an insulating film on a surface of said second semiconductor layer; (d) a step of forming a first control electrode on said insulating film; (e) a step of selectively forming a first conductivity type third semiconductor layer by employing said first control electrode as a part of a mask and selectively introducing a first conductivity type impurity into said surface of said second semiconductor layer; (f) a step of selectively forming a first conductivity type fourth semiconductor layer in isolation from said third semiconductor layer by employing said first control electrode as a part of a mask and selectively introducing a first conductivity type impurity into said surface of said second semiconductor layer; (g) a step of forming a second control electrode on a region in an exposed surface of said second semiconductor layer different from a region on which said insulating film is formed; (h) a step of forming a first main electrode on a surface of said third semiconductor layer; and (i) a step of forming a second main electrode on said second major surface of said first semiconductor layer. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20)
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Specification