Fractional phase interpolation of ring oscillator for high resolution pre-compensation

• US 6,009,534 A
• Filed: 06/01/1998
• Issued: 12/28/1999
• Est. Priority Date: 06/01/1998
• Status: Expired due to Term

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Chiu, Kar-Shing, Leung, Ming-Tak
• Primary Examiner(s): Heckler, Thomas M.
• Application Number:
  US09/088,551
• Time in Patent Office: 575 Days
• Field of Search: 713/503, 331/107 R, 331/108 B, 331/135, 365/189.01, 365/189.09
• US Class Current: 713/503
• CPC Class Codes: G11B 20/10009 Improvement or modification of read or write signals
• CPC Class Codes: G11B 5/012 Recording on, or reproducing or erasing from, magnetic disks G11B17/00, G11B19/00 take precedence
• CPC Class Codes: G11B 5/09 Digital recording
• CPC Class Codes: H03K 5/13 Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals

Abstract

The present invention includes a fractional interpretation circuit to be used to correct pre-write compensation for writing data on a disk. The present invention need not be limited to a three phase interpreter but could easily be extended to a 4X or 5X. This could simply be implemented by adding additional current paths from the capacitors to ground in order to incrementally change the slew rate and consequently the phase interpretation.

Claims

1. A phase interpolation circuit to provide a phase interpolation signal, comprising:

a circuit to generate a first phase signal and a second phase signal;

a control circuit to generate a control signal;

a first programmable ramp generator to receive the first phase signal and to alternatively generate either a first phase interpolation signal or a second phase interpolation signal based on said control signal;

a second programmable ramp generator to receive the second phase signal and to alternatively generate either a third phase interpolation signal or a fourth phase interpolation signal based on said control signal;

a summation circuit to sum either said first phase interpolation signal or said second phase interpolation signal with said third phase interpolation signal or said fourth phase interpolation signal to output a summation signal;

a precompensation circuit to generate a precompensation signal based on said summation signal.

2. A phase interpolation circuit to provide a phase interpolation signal as in claim 1, wherein,

said first programmable ramp generator generates either said first phase interpolation signal or said second phase interpolation signal based on changing the slew rate of said first programmable ramp generator.

3. A phase interpolation circuit to provide a phase interpolation signal as in claim 2, wherein,

said slew rate is changed by changing the current path of said first programmable ramp generator.

4. A phase interpolation circuit to provide a phase interpolation signal as in claim 1, wherein,

said second programmable ramp generator generates either said third phase interpolation signal or said fourth phase interpolation signal based on changing the slew rate of said second programmable ramp generator.

5. A phase interpolation circuit to provide a phase interpolation signal as in claim 4, wherein

said slew rate is changed by changing the current path of said second programmable ramp generator.

6. A system for precompensation comprising;

an oscillator circuit to generate a plurality of phase signals,

a multiplex circuit to select a first phase signal and

a second phase signal from said plurality of phase signals;

a control circuit to generate a control signal;

a first programmable ramp generator to receive the first phase signal and to alternatively generate either a first phase interpolation signal or a second phase interpolation signal based on said control signal;

a second programmable ramp generator to receive the second phase signal and to alternatively generate either a third phase interpolation signal or a fourth phase interpolation signal based on said control signal;

a summation circuit to sum either said first phase interpolation signal or said second phase interpolation signal with said third phase interpolation signal or said fourth phase interpolation signal to output a summation signal;

a precompensation circuit to generate a precompensation signal based on said summation signal.

7. A system for precompensation as in claim 6, wherein,

said first programmable ramp generator generates either said first phase interpolation signal or said second phase interpolation signal based on changing the slew rate of said first programmable ramp generator.

8. A system for precompensation as in claim 7, wherein,

said slew rate is changed by changing the current path of said first programmable ramp generator.

9. A system for precompensation as in claim 6, wherein,

said second programmable ramp generator generates either said third phase interpolation signal or said fourth phase interpolation signal based on changing the slew rate of said second programmable ramp generator.

10. A system for precompensation signal as in claim 9, wherein

said slew rate is changed by changing the current path of said second programmable ramp generator.

11. A method to provide a phase interpolation signal, comprising the steps of:

generating a first phase signal and a second phase signal;

generating a control signal;

receiving the first phase signal and alternatively generating either a first phase interpolation signal or a second phase interpolation signal based on said control signal;

receiving the second phase signal and alternatively generating either a third phase interpolation signal or a fourth phase interpolation signal based on said control signal;

summing either said first phase interpolation signal or said second phase interpolation signal with said third phase interpolation signal or said fourth phase interpolation signal to output a summation signal;

generating a precompensation signal based on said summation signal.

12. A method to provide a phase interpolation signal as in claim 11, wherein the method,

generates either said first phase interpolation signal or said second phase interpolation signal based on changing the slew rate of a programmable ramp generator.

13. A method to provide a phase interpolation signal as in claim 11, wherein the method,

generates either said third phase interpolation signal or said fourth phase interpolation signal based on changing the slew rate of a programmable ramp generator.