Reusable substrate for thin film separation

• US 6,010,579 A
• Filed: 02/19/1998
• Issued: 01/04/2000
• Est. Priority Date: 05/12/1997
• Status: Expired due to Term

• Current Assignee: Silicon Genesis
• Original Assignee: Silicon Genesis
• Inventors: Henley, Francois J., Cheung, Nathan W.
• Primary Examiner(s): Bowers, Charles
• Assistant Examiner(s): Thompson, Craig
• Application Number:
  US09/026,035
• Time in Patent Office: 684 Days
• Field of Search: 148/33.2, 148/DIG. 11, 148/33.1, 438/350, 438/362, 438/313, 438/366
• US Class Current: 148/33.2
• CPC Class Codes: B81C 1/0038 Processes for creating layers of materials not provided for in groups B81C1/00357 - B81C1/00373
• CPC Class Codes: B81C 2201/0191 Transfer of a layer from a carrier wafer to a device wafer
• CPC Class Codes: B81C 2201/0192 by cleaving the carrier wafer
• CPC Class Codes: H01L 21/187 by direct bonding
• CPC Class Codes: H01L 21/2007 Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer H01L21/2011 takes precedence; bonding of semiconductor wafers to semiconductor wafers for junction formation H01L21/187
• CPC Class Codes: H01L 21/2236 from or into a plasma phase
• CPC Class Codes: H01L 21/26506 in group IV semiconductors
• CPC Class Codes: H01L 21/2658 of a molecular ion, e.g. decaborane
• CPC Class Codes: H01L 21/304 Mechanical treatment, e.g. grinding, polishing, cutting H01L21/30625 takes precedence
• CPC Class Codes: H01L 21/7624 using semiconductor on insulator [SOI] technology H01L21/76297 takes precedence; manufacture of integrated circuits on insulating substrates H01L21/84; silicon on sapphire [SOS] technology H01L21/86
• CPC Class Codes: H01L 21/76254 with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
• CPC Class Codes: H01L 21/7813 leaving a reusable substrate, e.g. epitaxial lift off
• CPC Class Codes: Y10S 117/915 Separating from substrate
• CPC Class Codes: Y10S 156/93 Semiconductive product delaminating, e.g. delaminating emiconductive wafer from underlayer
• CPC Class Codes: Y10S 438/974 Substrate surface preparation
• CPC Class Codes: Y10S 438/977 Thinning or removal of substrate
• CPC Class Codes: Y10T 156/11 Methods of delaminating, per se; i.e. , separating at bonding face
• CPC Class Codes: Y10T 156/1158 Electromagnetic radiation applied to work for delamination [e.g., microwave, uv, ir, etc.]
• CPC Class Codes: Y10T 156/19 Delaminating means
• CPC Class Codes: Y10T 428/21 Circular sheet or circular blank
• CPC Class Codes: Y10T 428/24893 : including particulate material
• CPC Class Codes: Y10T 428/249956 : Void-containing component is inorganic

Abstract

A donor substrate (10) for forming multiple thin films of material (12). In one embodiment, a first thin film of material is separated or cleaved from a donor substrate by introducing energetic particles (22) through a surface of a donor substrate (10) to a selected depth (20) underneath the surface, where the particles have a relatively high concentration to define donor substrate material (12) above the selected depth. Energy is provided to a selected region of the substrate to cleave a thin film of material from the donor substrate. Particles are introduced again into the donor substrate underneath a fresh, or cleaved, surface of the donor substrate. A second thin film of material is then cleaved from the donor substrate.

Claims

1. A semiconductor substrate device comprising:

a donor wafer having a cleaved surface; and

a layer of particles disposed within said donor wafer a selected distance from and substantially parallel to said cleaved surface to define a layer of donor wafer material between said layer of particles and said cleaved surface.

2. The device of claim 1 wherein the cleaved surface is polished.

3. The device of claim 1 further comprising a dielectric layer disposed on said cleaved surface.

4. The device of claim 3 wherein the dielectric layer is planarized.

5. The device of claim 3 wherein the dielectric layer is spin-on glass.

6. The device of claim 3 wherein the dielectric layer is plasma-deposited silicon oxide.

7. The device of claim 3 wherein the donor wafer is a single-crystal silicon wafer.

8. The device of claim 1 wherein the selected distance is less than fifteen microns.

9. A semiconductor substrate device comprising:

a single-crystal silicon donor wafer having a cleaved surface approximately parallel to a major crystallographic plane; and

a layer of particles implanted into said donor wafer through said cleaved surface a selected distance from said cleaved surface to define a layer of donor wafer material between said layer of particles and said cleaved surface.

10. The device of claim 9 wherein said particles are hydrogen ions.

11. The device of claim 10 wherein said hydrogen ions are implanted using plasma-immersion ion implantation.

12. The device of claim 9 wherein the major crystallographic plane is a {100} plane.

13. The device of claim 9 wherein the major crystallographic plane is a {110} plane.

14. The device of claim 9 wherein the major crystallographic plane is a {111} plane.

15. The device of claim 9 wherein an as-grown defect density of the cleaved surface has been reduced to an annealed defect density by a thermal treatment of the donor wafer.