Electronic component assembly and method for low cost EMI and capacitive coupling elimination

• US 6,011,691 A
• Filed: 04/23/1998
• Issued: 01/04/2000
• Est. Priority Date: 04/23/1998
• Status: Expired due to Fees

• Current Assignee: Lockheed Martin Corporation (Martin Marietta Corporation)
• Original Assignee: Lockheed Martin Corporation (Martin Marietta Corporation)
• Inventors: Schreffler, Gary J.
• Primary Examiner(s): Sparks, Donald
• Assistant Examiner(s): DATSKOVSKIY, MICHAIL V
• Application Number:
  US09/064,735
• Time in Patent Office: 621 Days
• Field of Search: 361/704-707, 361/715-725, 361/688, 361/816, 361/813, 361/815, 361/806, 361/820, 361/684, 257/703, 257/705, 257/720, 257/795, 257/706, 257/747, 257/659, 257/700, 257/710, 257/738, 257/664, 165/46, 165/185, 165/80.3, 165/80.4, 428/650, 428/195, 428/621, 428/614, 428/185, 428/285, 428/406, 428/408, 428/457, 428/901, 428/902, 29/25.42, 29/650, 29/195, 29/137, 29/843, 216/18, 438/119, 228/126, 439/79, 174/52.4, 174/35 MS, 174/252, 174/254, 174/16.3, 174/62.8
• US Class Current: 361/704
• CPC Class Codes: H01L 23/60 Protection against electrostatic charges or discharges, e.g. Faraday shields
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H05K 1/0218 by printed shielding conductors, ground planes or power plane H05K1/0236 takes precedence
• CPC Class Codes: H05K 1/056 the metal substrate being covered by an organic insulating layer
• CPC Class Codes: H05K 9/0039 Galvanic coupling of ground layer on printed circuit board [PCB] to conductive casing printed shielding conductors, ground planes or power planes for reduction of cross-talk or noise in printed circuits H05K1/0218

Abstract

The present invention is directed to an electronic component assembly which cost effectively eliminates capacitive coupling while providing significant heat transfer. Exemplary embodiments ensure that the circuit ground of electrical circuits on printed wiring boards and the chassis ground remain separate so that undesired ground loops are not created and so that a Faraday shield or "cage" can be established around all circuit elements to reduce EMI effects on the circuit.

Claims

1. An electronic component assembly comprising:

at least one electrical circuit having a first ground; and

a heat sink assembly connected to said electrical circuit, said heat sink assembly further comprising;

an inner core;

a dielectric material that covers at least a portion of said inner core; and

a conductive material having a second ground, formed on a conductive foil located on at least a portion of said dielectric material, said conductive material surrounding the periphery of said at least one electrical circuit for electromagnetically shielding said at least one electrical circuit.

2. The electronic component assembly of claim 1, wherein said inner core is made of an inner core material which is selected based on its electrical conductivity and thermal conductivity.

3. The electric component assembly of claim 2, wherein said inner core material is made of graphite composite.

4. The electronic component assembly of claim 1 wherein said dielectric material has a selected temperature value T_g at which the dielectric material changes properties.

5. The electronic component assembly of claim 4, wherein said dielectric material is selected from the group consisting of:

cyanate ester laminate, an epoxy based laminate, kevlar and polyamide quartz.

6. The electronic component assembly of claim 1, wherein said conductive material is nickel.

7. The electronic component assembly of claim 1, further comprising;

a cover contacting said conductive material to form an electric shielding around said at least one electric circuit.

8. A heat sink assembly comprising:

a conductive inner core material at a first ground potential having a selected thermal conductivity and a selected electrical conductivity;

a first layer of a dielectric material placed at least in part on said conductive inner core and selected based upon a temperature at which said dielectric material changes physical properties;

a conductive material which contacts said inner core and extends from said inner core through a surface of said first layer; and

a second conductive layer at a second ground potential selectively placed on said first layer.

9. The heat sink assembly of claim 8, further comprising;

a third conductive layer at said second ground potential placed on said second conductive layer.

10. A method for eliminating capacitive coupling between two electrical circuits comprising:

providing an inner core comprising a heat sink material, and a dielectric layer placed around said inner core;

selectively plating said dielectric layer with a first electrically conductive foil and plating a conductive material on the first electrically conductive foil;

placing first and second electrical circuits on the dielectric layer on opposite sides of said inner core;

making a hole in said inner core to extend from said first electrical circuit through the inner core and dielectric layer to the second electrical circuit; and

plating said hole with a second electrically conductive foil to create a ground path among said inner core and said first and second electrical circuits.

11. The method of claim 10, further comprising:

placing a conductive cover, in contact with the electrically conductive material, over at least one of said first and second electrical circuits to provide an electrical shield, with said second ground potential, around said at least one circuit.

12. The method of claim 11, wherein said second electrically conductive material is nickel.

13. The method of claim 12, wherein said first electrically conductive material is copper.

14. The method of claim 10, wherein said inner core is made of an inner core material having selected electrical conductivity and thermal conductivity.

15. The method of claim 14, wherein said inner core material is made of graphite composite.

16. The method of claim 10, wherein said dielectric material has a selected electrical conductivity and a temperature value T_g at which the dielectric material changes properties.

17. The method of claim 10, wherein said dielectric material is selected from the group consisting of:

cyanate ester laminate, epoxy based laminate, kevlar and polyamide quartz.