Computer memory cards using flash EEPROM integrated circuit chips and memory-controller systems
First Claim
1. A non-volatile memory system adapted for use with a host system, comprising:
- a memory controller having a connector to receive a memory card and connectable to (1) receiving address, user data and command signals from said host system according to a given protocol and (2) providing user data and status signals to said host system according to said given protocol, said controller including at least one microprocessor that executes commands from the host system and a buffer memory that temporarily stores user data being written to or read from a memory card inserted in the controller connector,a plurality of said memory cards which individually include a card connector that mechanically mates with the controller connector to provide a removable electrical connection therebetween, said card connector being connected to an integrated circuit array of floating gate memory cells organized in groups of cells that are individually addressable for simultaneous erasure of the cells of a group, said memory cards additionally being individually formed of a package having a width less than 5.5 centimeters and a length less than 9.0 centimeters,said memory controller additionally being responsive to an address of at least one mass memory storage block from the host system for accessing through said controller and card connectors a corresponding at least one of the memory cell groups within one of the plurality of memory cards having its card connector mated with said controller connector, anda serial communications circuit extending through the controller and memory card connectors to transfer user data between the buffer memory of said controller and said at least one accessed memory cell group.
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Accused Products
Abstract
A very small computer memory card is densely packed with a large number of flash EEPROM integrated circuit chips. A computer memory system provides for the ability to removably connect one or more of such cards with a common controller circuit that interfaces between the memory cards and a standard computer system bus. Alternately, each card can be provided with the necessary controller circuitry and thus is connectable directly to the computer system bus. An electronic system is described for a memory system and its controller within a single memory card. In a preferred physical arrangement, the cards utilize a main circuit board with a plurality of sub-boards attached thereto on both sides, each sub-board carrying several integrated circuit chips.
360 Citations
9 Claims
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1. A non-volatile memory system adapted for use with a host system, comprising:
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a memory controller having a connector to receive a memory card and connectable to (1) receiving address, user data and command signals from said host system according to a given protocol and (2) providing user data and status signals to said host system according to said given protocol, said controller including at least one microprocessor that executes commands from the host system and a buffer memory that temporarily stores user data being written to or read from a memory card inserted in the controller connector, a plurality of said memory cards which individually include a card connector that mechanically mates with the controller connector to provide a removable electrical connection therebetween, said card connector being connected to an integrated circuit array of floating gate memory cells organized in groups of cells that are individually addressable for simultaneous erasure of the cells of a group, said memory cards additionally being individually formed of a package having a width less than 5.5 centimeters and a length less than 9.0 centimeters, said memory controller additionally being responsive to an address of at least one mass memory storage block from the host system for accessing through said controller and card connectors a corresponding at least one of the memory cell groups within one of the plurality of memory cards having its card connector mated with said controller connector, and a serial communications circuit extending through the controller and memory card connectors to transfer user data between the buffer memory of said controller and said at least one accessed memory cell group. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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Specification