Apparatus and method for input data loss prevention with a buffered UART

• US 6,012,110 A
• Filed: 12/26/1997
• Issued: 01/04/2000
• Est. Priority Date: 12/26/1997
• Status: Expired due to Term

• Current Assignee: Digi International Inc.
• Original Assignee: Digi International Inc.
• Inventors: Richardson, Ralph E., Olson, Gene H.
• Primary Examiner(s): Shin, Christopher B.
• Application Number:
  US08/998,492
• Time in Patent Office: 739 Days
• Field of Search: 709/250, 710/29-35, 710/46-64, 710/72-74, 710/107-110, 370/449
• US Class Current: 710/60
• CPC Class Codes: G06F 13/385 for adaptation of a particular data processing system to different peripheral devices

Abstract

An apparatus for handling data at two or more ports is described. In one embodiment, the apparatus comprises an apparatus for receiving data at multiple ports, each port having a buffer capable of holding B units of received data and being serviced by a processor resource. The apparatus has software causing the processor resource to have a polling session with each port and to read unread units of data from the buffer in each port during its polling session. It also has a counter for determining the number of units of data that have been read from the buffer and circuitry responsive to said counter to assert flow control from said port based on the number of units of data read.

Claims

1. An apparatus for receiving data at two or more ports, each port having a buffer capable of holding B units of received data, said two or more ports being serviced by a processor resource, comprising:

(a) software causing said processor resource to periodically poll each port for a variable period of time ("polling session") and to read unread units of data from the buffer in each port during its polling session;

(b) a counter for determining the number of units of data that have been read from the buffer; and

(c) circuitry responsive to said counter to assert flow control from said port based on the number of units of data read from the buffer.

2. The apparatus of claim 1 where the circuitry enforces flow control when the number of units of data read from the buffer exceeds a threshold N.

3. The apparatus of claim 1 wherein the flow control is a software control signal.

4. The apparatus of claim 1 wherein the flow control is a hardware control signal.

5. The apparatus of claim 2 wherein the buffer size is B bytes and N is less than B bytes.

6. The apparatus of claim 5 wherein there are 16 ports with a 230 kilobaud receipt rate and a polling rate of 1440 times/second.

7. The apparatus of claim 2 wherein the processor resource has a nominal polling interval of P character times and N is greater than P.

8. The apparatus of claim 2 wherein N is empirically determined to reduce the probability of buffer overflow to an acceptably low level.

9. The apparatus of claim 1 wherein the buffer is a FIFO buffer.

10. The apparatus of claim 1 wherein each port has a 1665x UART.

11. The apparatus of claim 1 further comprising:

an indicator for showing whether the buffer contains any unread units of data and de-assert means responsive to the indicator for showing whether the buffer contains any unread units of data and to the counter to de-assert flow control from said port if there are no unread units of data.

12. The apparatus of claim 11 wherein the de-assert means has a threshold that limits the number of de-assert actions that can be taken in any polling interval.

13. The apparatus of claim 12 wherein the processor resource has a nominal polling interval of P character times and N is greater than P and the number of de-assert actions L that can be taken in any polling interval is much less than N.

14. The apparatus of claim 12 wherein N is 16 and L is 2.

15. A method for controlling data received at two or more ports, each port having a buffer capable of holding B units of data and being serviced by a processor resource, comprising:

(a) causing the processor resource to have a polling session of a variable time duration with each port and to read unread units of data from the buffer in each port during its polling session;

(b) determining the number of units of data read from the buffer; and

(c) asserting flow control from said port based on the number of units of data read from the buffer.

16. The method of claim 15 wherein the act of asserting flow control comprises inhibiting the reading of more than N units of data on any one polling session and asserting flow control from said port if N units of data are read.

17. The method of claim 15 wherein the act of asserting flow control comprises providing a software control signal.

18. The method of claim 15 wherein the act of asserting flow control comprises providing a hardware control signal.

19. The method of claim 15 wherein the act of causing the processor resource to have a polling session with each port and to read unread units of data from the buffer comprises polling a buffer whose size is B bytes and the act of inhibiting the reading of more than N units of data utilizes an N value less than B.

20. The method of claim 18 wherein the act of causing the processor resource to have a polling session with each port and to read unread units of data from the buffer in each port comprises polling and reading from 16 ports with a 230 kilobaud receipt rate at each port and the act of inhibiting the removal of more than N units of data comprises inhibiting removal of more than 19 bytes.

21. The method of claim 16 further comprising empirically determining the number N to reduce the probability of buffer overflow to an acceptably low level.

22. The method of claim 15 wherein the act of causing the processor resource to have a polling session with each port and to read unread units of data from the buffer comprises polling a FIFO buffer.

23. The method of claim 15 wherein the act of causing the processor resource to have a polling session with each port and to read unread units of data from the buffer comprises polling and reading from a port that has a 1665x UART.

24. The method of claim 15 further comprising determining whether the buffer contains any unread units of data and de-asserting flow control from said port if there are no unread units of data and N units of data have not been read.

26. The method of claim 24 wherein the act of asserting flow control comprises inhibiting the reading of more than N units of data on any one polling session and asserting flow control from said port if N units of data are read.

27. The computer-readable medium of claim 24 comprises providing a hardware control signal.

28. The computer-readable medium of claim 24 wherein the act of causing the processor resource to have a polling session with each port and to read unread units of data from the buffer comprises polling a buffer whose size is B bytes and the act of inhibiting the reading of more than N units of data utilizes an N value less than B.

29. The computer-readable medium of claim 27 wherein the act of causing the processor resource to have a polling session with each port and to read unread units of data from the buffer in each port comprises polling and reading from 16 ports with a 230 kilobaud receipt rate at each port and the act of inhibiting the removal of more than N units of data comprises inhibiting removal more than 19 bytes.

32. The computer-readable medium of claim 24 wherein the act of causing the processor resource to have a polling session with each port and to read unread units of data from the buffer comprises polling a FIFO buffer.

33. The computer-readable medium of claim 24 wherein the act of causing the processor resource to have a polling session with each port and to read unread units of data from the buffer comprises polling and reading from a port that has a 1665x UART.

25. A computer-readable medium whose contents cause a processor resource to control data received at two or more ports, each port having a buffer capable of holding B units of data and being serviced by a processor resource, by performing a method comprising:

(a) causing the processor resource to have a polling session of a variable time duration with each port and to read unread units of data from the buffer in each port during its polling session;

(b) determining the number of units of data read from the buffer; and

(c) asserting flow control from said port based on the number of units of data read from the buffer.

30. The computer-readable medium of claim 25 wherein the act of causing the processor resource to have a polling session with each port and to read unread units of data from the buffer comprises polling a buffer whose size is B bytes and the act of inhibiting the reading of more than N units of data utilizes an N value less than B minus a number of bytes corresponding to the worst case latency of the flow control.

31. The computer-readable medium of claim 25 wherein the method performed further comprises empirically determining the number N to reduce the probability of buffer overflow to an acceptably low level.