Integrated circuit with variable capacitor

• US 6,013,958 A
• Filed: 07/23/1998
• Issued: 01/11/2000
• Est. Priority Date: 07/23/1998
• Status: Expired due to Term

• Current Assignee: Bell Semiconductor, LLC (Hilco Inc. (d/b/a Hilco Global))
• Original Assignee: Lucent Technologies, Inc. (Nokia Corporation)
• Inventors: Aytur, Turgut Sefket
• Primary Examiner(s): Gaffin, Jeffrey
• Assistant Examiner(s): HUYNH, KIM NGOC
• Application Number:
  US09/121,284
• Time in Patent Office: 537 Days
• Field of Search: 307/108-110, 257/296, 257/298, 257/300, 257/312, 455/196.1, 455/197.1, 455/197.2, 326/27, 326/32, 326/26, 326/21, 235/132, 235/133, 360/39, 360/48
• US Class Current: 307/109
• CPC Class Codes: H03J 2200/10 Tuning of a resonator by means of digitally controlled capacitor bank
• CPC Class Codes: H03J 3/185 with varactors, i.e. voltage variable reactive diodes

Abstract

Disclosed is an integrated circuit having a plurality of combinations of an integrated unit capacitor connected in series with a controlled channel of an integrated transistor switch. The series-connected capacitor and switch combinations are connected in parallel and the switches include a control gate coupled to a bit output of a register via a control line. In this manner, the capacitance of the variable capacitor depends on what word is stored in the register. Control gates for a different number of capacitor and switch combinations are connected to each bit output, and the numbers are weighted using, e.g., a binary weighting scheme. The variable capacitor is coupled to a balanced signal line pair, with capacitor and switch combinations comprising a switch connected between two capacitors that are connected to a line of the balanced signal line pair. Such arrangement is highly linear and even order distortion is reduced. The disclosed integrated circuit arrangements reduce the sensitivity to noise on the control line of the device. Variations in voltage applied to the control line and thus to the control gate of the switch vary the resistance value of the switch when closed, yet affect the value of the capacitive portion of the impedance very little. The disclosed capacitors are useful in circuits that need to be accurately trimmed once (e.g., filters) and in circuits in which variable capacitance is required, such as voltage controlled oscillators (VCOs).

Claims

1. An integrated circuit, for use in a balanced line configuration, said integrated circuit comprising:

a plurality of combinations of an integrated unit capacitor connected in series with a controlled channel of an integrated transistor switch, the combinations being connected in parallel, wherein at least one of the transistor switches has a control gate coupled to a bit output of a register whereby the capacitance of the interconnect variable capacitor depends on what word is stored in the register, wherein the integrated unit capacitor in at least one of the combinations is coupled to a balanced signal line pair, and wherein at least one of the combinations comprises a transistor switch connected between two integrated unit capacitors connected to a line of said balanced signal line pair.

2. The integrated circuit as recited in claim 1, wherein control gates for a different number of combinations are connected to at least one of the bit outputs of the register.

3. The integrated circuit as recited in claim 2, wherein the numbers are weighted using a weighting scheme selected from the group consisting of binary weighting and unit weighting.

4. The integrated circuit as recited in claim 1, wherein nodes between the capacitor and the transistor switch are connected to ground via respective resistors.

5. The integrated circuit as recited in claim 1, wherein at least one combination comprises first and second branches containing an integrated unit capacitor and a transistor switch connected in series, the first and second branches being connected in parallel such that the integrated unit capacitor is connected directly to a respective one of said balanced signal line pair.