Rugged metal electrodes for metal-insulator-metal capacitors

• US 6,015,986 A
• Filed: 10/06/1997
• Issued: 01/18/2000
• Est. Priority Date: 12/22/1995
• Status: Expired due to Term

• Current Assignee: Round Rock Research LLC
• Original Assignee: Micron Technology, Inc.
• Inventors: Schuegraf, Klaus F.
• Primary Examiner(s): Abraham, Fetsum
• Application Number:
  US08/943,222
• Time in Patent Office: 834 Days
• Field of Search: 257/298, 257/303, 257/304, 257/309, 257/310, 257/311, 438/30, 438/699, 438/240, 438/253
• US Class Current: 257/303
• CPC Class Codes: H01L 21/76886 Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
• CPC Class Codes: H01L 28/55 with a dielectric comprising a perovskite structure material
• CPC Class Codes: H01L 28/82 with an enlarged surface, e.g. formed by texturisation
• CPC Class Codes: H01L 28/84 being a rough surface, e.g. using hemispherical grains
• CPC Class Codes: H01L 28/91 made by depositing layers, e.g. by depositing alternating conductive and insulating layers
• CPC Class Codes: H10B 12/033 the capacitor extending over the transistor
• CPC Class Codes: H10B 12/318 the storage electrode having multiple segments
• CPC Class Codes: Y10S 438/933 Germanium or silicon or Ge-Si on III-V
• CPC Class Codes: Y10S 438/964 Roughened surface

Abstract

Thin film metal-insulator-metal capacitors having enhanced surface area are formed by a substituting metal for silicon in a preformed electrode geometry. The resulting metal structures are advantageous for high-density DRAM applications since they have good conductivity, enhanced surface area and are compatible with capacitor dielectric materials having high dielectric constant.

Claims

1. A DRAM capacitor comprising:

an electrode formed of a substantially pure metal layer directly over and contacting a surface of a conductive silicon structure, the metal layer having a hemispherical surface morphology different from the surface morphology of said underlying surface of said conductive silicon structure;

a dielectric layer directly over and contacting the metal layer; and

a conductive layer directly over and contacting the dielectric layer.

2. The DRAM capacitor of claim 1, wherein the metal layer is substantially formed of a refractory metal.

3. The DRAM capacitor of claim 2, wherein the refractory metal is tungsten.

4. The DRAM capacitor of claim 1, wherein the dielectric layer is comprised of a material selected from the group consisting of Ta₂ O₅, BaTiO₃, SrTiO₃, Ba_x Sr_1-x TiO₃, and PbZr_x Ti_1-x O₃.

5. The DRAM capacitor of claim 1, wherein the conductive layer comprises a refractory metal.

6. The DRAM capacitor of claim 5, wherein the refractory metal is titanium.

7. The DRAM capacitor of claim 1, wherein the conductive silicon structure comprises a polysilicon plug.

8. A capacitor within an integrated circuit comprising:

an electrode having a hemispherically textured surface, the surface consisting essentially of a substantially pure metal formed over and directly contacting a surface of a conductive silicon structure, said textured surface not conforming to said surface of said conductive silicon structure;

a dielectric layer covering said textured surface; and

a second electrode covering said dielectric layer.

9. The capacitor of claim 8, wherein the metal is tungsten.

10. The capacitor of claim 8, wherein the dielectric layer comprises a high dielectric oxide.

11. The capacitor of claim 8, wherein the conductive silicon structure comprises a polysilicon plug.

12. An integrated circuit capacitor, comprising:

a storage electrode comprising a substantially pure metal layer, the metal layer including a smooth base portion and a rugged portion having a hemispherical surface morphology, the rugged portion integrally formed with and extending from the base portion;

a dielectric layer directly over and contacting the rugged portion of the metal layer; and

a reference electrode directly over and contacting the dielectric layer.

13. The integrated circuit capacitor of claim 12, wherein the rugged portion of the metal layer is electrically connected to an integrated transistor active area by way of the base portion.

14. The integrated circuit capacitor of claim 13, wherein the base portion of the metal layer is electrically connected to the transistor active area by way of a conductive plug.

15. An integrated circuit comprising a capacitor, the capacitor comprising:

a first electrode having a hemispherically textured surface, the surface consisting essentially of a substantially pure metal formed over and directly contacting a non-textured crystalline structure;

a dielectric layer covering said textured surface; and

a second electrode covering said dielectric layer.

16. The integrated circuit of claim 15, wherein the crystalline structure comprises a polysilicon plug.