Semiconductor device mounting structure

• US 6,016,013 A
• Filed: 08/20/1997
• Issued: 01/18/2000
• Est. Priority Date: 08/20/1996
• Status: Expired due to Term

• Current Assignee: Adeia Semiconductor Advanced Technologies Inc. (f/k/a Tessera Advanced Technologies, Inc.) (Adeia Inc.)
• Original Assignee: NEC Corporation
• Inventors: Baba, Mikio
• Primary Examiner(s): Martin-Wallace, Valencia
• Assistant Examiner(s): CLARK, JASMINE JHIHAN B
• Application Number:
  US08/915,272
• Time in Patent Office: 881 Days
• Field of Search: 257/778, 257/777, 257/783, 257/737, 257/738, 228/180.22, 438/108, 438/736
• US Class Current: 257/778
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/81136 involving guiding structures, e.g. spacers or supporting members
• CPC Class Codes: H01L 2224/81801 Soldering or alloying
• CPC Class Codes: H01L 24/81 using a bump connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01029 Copper [Cu]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/01082 Lead [Pb]
• CPC Class Codes: H01L 2924/014 Solder alloys
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/351 Thermal stress

Abstract

Insulating resin layers are formed respectively so as to cover electrical pads for the purpose of connecting metal bumps of a semiconductor device and a mounting board, metal bump electrode pads being formed on the surface of these insulating resin layers, so that the electrode pads are electrically connected to one another. Thermal stress between the semiconductor device and the mounting board is absorbed by the insulating resin layers, the influence felt on the metal bumps being alleviated, thereby achieving an improvement in the reliability of the connection made by the metal bumps.

Claims

1. A flip-chip mounting structure for a semiconductor device in which a semiconductor device which is provided with a first electrode pad on a mounting surface thereof and a mounting board which is provided with a second electrode pad on a surface thereof, are connected to each other by means of a metal bump, said mounting structure comprising:

a first insulating means having a first conductive wiring pattern arranged inside thereof, formed on a front surface of said semiconductor device, and;

a second insulating means having a second conductive wiring pattern arranged inside thereof, formed on the front surface of the mounting board, wherein each of said first and second insulating means is formed by at least two insulating resin layers stacked on each other with said first and second conductive wiring patterns respectively interposed therebetween,

a first insulating resin layer formed on a front surface of said semiconductor device, with first metal bump electrode pads to be electrically connected to said first electrode pad being formed onto a front surface of said first insulating resin layer, and

a second insulating resin layer formed on the front surface of the mounting board, with second metal bump electrode pads to be electrically connected to said second electrode pad being formed on a top surface of said second insulating resin layer,

said first and second metal bump electrode pads being mutually connected by said metal bumps;

said first electrode pad being offset connected to said metal bump through said first conductive wiring pattern and said second electrode pad being offset connected to said metal bump through said second conductive wiring pattern.

2. A semiconductor device mounting structure according to claim 1, wherein said first insulating resin layer has a configuration in which a first wiring pattern is formed on a surface thereof, over a part of which surface is provided a through hole through which said first electrode pad and said first wiring pattern are connected, a first surface insulating resin layer which covers said first wiring pattern being provided and an aperture being formed in part of said first surface insulating resin layer so as to expose part of said first wiring pattern thereby forming a first metal bump electrode pad, and wherein said mounting board has a second wiring pattern formed on a surface thereof, a through hole provided in a part of said second surface insulating resin layer through which an electrical connection between said second electrode pad and said second wiring pattern is formed, an aperture being formed in part of said second surface insulating resin layer which covers said second wiring pattern so as to expose part of said second wiring pattern, thereby forming a second metal bump electrode pad.

3. A semiconductor device mounting structure according to claim 1, wherein said first insulating means and said second insulating means are disposed in spaced opposition to one another, and further comprising a resin layer formed in the space between said first insulating means over said semiconductor device and said second insulating means over said mounting board.

4. A semiconductor device mounting structure according to claim 1, wherein a film carrier formed of an electrically conductive film is formed on at least one of said first insulating layer and said second insulating layer, said film carrier being adhered to a surface of either said semiconductor device or said mounting board.

5. A semiconductor device mounting structure according to claim 2, wherein said metal bump comprises solder, and wherein said first and second insulating resin layers and said first and second surface insulating resin layers comprise a polyimide resin.

6. A flip-chip mounting structure for a semiconductor device in which a semiconductor device which is provided with a first electrode pad on a mounting surface thereof and a mounting board which is provided with a second electrode pad on a surface thereof, are connected to each other by means of a metal bump, said mounting structure comprising:

a first insulating means comprising at least two stacked insulating layers having a first conductive wiring pattern interposed therebetween, formed on a front surface of said semiconductor device, and including first metal bump electrode pads to be electrically connected to said first electrode pad formed on a front surface of said first insulating means,

a second insulating means comprising at least two stacked insulating layers having a second conductive wiring pattern interposed therebetween, formed on the front surface of the mounting board, and including second metal bump electrode pads to be electrically connected to said second electrode pad formed on a top surface of said second insulating means,

wherein said first and second metal bump electrode pads are mutually connected by said metal bumps, and said first insulating resin layer has a configuration in which said first wiring pattern is formed on a surface thereof, over a part of which surface is provided a through hole through which said first electrode pad and said first wiring pattern are connected, a first surface insulating layer which covers said first wiring pattern being provided and an aperture being formed in part of said first surface insulating layer so as to expose part of said first wiring pattern thereby forming a first metal bump electrode pad, and wherein said mounting board has a second wiring pattern formed on a surface thereof, a through hole provided in a part of said second surface insulating layer through which an electrical connection between said second electrode pad and said second wiring pattern is formed, an aperture being formed in part of said second surface insulating layer which covers said second wiring pattern so as to expose part of said second wiring pattern, thereby forming a second metal bump electrode pad,

and wherein said first electrode pad is connected to said metal bump through said first conductive layer and said second electrode pad is connected to said metal bump through said second conductive layer.

7. A semiconductor device mounting structure according to claim 6, wherein said metal bump comprises solder, and wherein said first and second insulating layers and said first and second surface insulating layers comprise a polyimide resin.

8. A semiconductor device mounting structure according to claim 6, said first insulating means and said second insulating means are disposed in spaced opposition to one another, and further comprising a resin poured into the space between said first insulating means over said semiconductor device and said second insulating means over said multilayer printed circuit board.

9. A semiconductor device mounting structure according to claim 6, wherein a film carrier formed of an electrically conductive film is formed on at least one of said first insulating layer and said second insulating layer, said film carrier being adhered to a surface of either said semiconductor device or said mounting board.

10. A flip-chip mounting structure for a semiconductor device in which a semiconductor device which is provided with a first electrode pad on a mounting surface thereof and a mounting board which is provided with a second electrode pad on a surface thereof, are connected to each other by means of a metal bump, said mounting structure comprising:

a first insulating means comprising first and second stacked insulating layers, and having a first conductive wiring pattern arranged inside thereof, formed on a front surface of said semiconductor device, and;

a second insulating means comprising first and second stacked insulating layers, and having a second conductive wiring pattern arranged inside thereof, formed on the front surface of the mounting board,

said first electrode pad being offset connected to said metal bump through said first conductive wiring pattern and said second electrode pad being offset connected to said metal bump through said second conductive wiring pattern, wherein each of said first and second insulating means is formed by at least two insulating resin layers stacked one on top of the other with said first and second conductive wiring patterns respectively interposed therebetween.

11. A flip-chip mounting structure according to claim 10, wherein said mounting structure further comprises:

a first insulating resin layer formed on a front surface of said semiconductor device, with first metal bump electrode pads to be electrically connected to said first electrode pad being formed onto a front surface of said first insulating resin layer, and

a second insulating resin layer formed on the front surface of the mounting board, with second metal bump electrode pads to be electrically connected to said second electrode pad being formed on a top surface of said second insulating resin layer,

said first and second metal bump electrode pads being mutually connected by said metal bumps.

12. A semiconductor device mounting structure according to claim 10, wherein said first insulating means and said second insulating means are disposed in spaced opposition to one another, and further comprising a resin poured into the space between said first insulating means over said semiconductor device and said second insulating means over said mounting board.

13. A semiconductor device mounting structure according to claim 11, wherein said metal bump electrode pads comprise solder, and wherein said first and second insulating resin layers and said first and second surface insulating resin layers comprise a polyimide resin.

14. A semiconductor device mounting structure according to claim 11, wherein a film carrier formed of an electrically conductive film is formed on at least one of said first insulating layer and said second insulating layer, said film carrier being adhered to a surface of either said semiconductor device or said mounting board.

15. A flip-chip mounting structure for a semiconductor device in which a semiconductor device which is provided with a first electrode pad on a mounting surface thereof and a mounting board which is provided with a second electrode pad on a surface thereof, are connected to each other by means of a metal bump, said mounting structure comprising:

a first insulating means having a first conductive wiring pattern arranged inside thereof, formed on a front surface of said semiconductor device, and;

a second insulating means having a second conductive wiring pattern arranged inside thereof, formed on the front surface of the mounting board,

said first electrode pad being offset connected to said metal bump through said first conductive wiring pattern and said second electrode pad being offset connected to said metal bump through said second conductive wiring pattern, wherein said first insulating means and said second insulating means are disposed in spaced opposition to one another, and further comprising a resin layer formed in the space between said first insulating means over said semiconductor device and said second insulating means over said mounting board.