Low phase noise LC oscillator for microprocessor clock distribution
First Claim
1. An oscillator circuit comprising:
- a bias circuit having a first bias circuit output line and a second bias circuit output line;
a CMOS core oscillator circuit having;
a spiral inductor connected between the first and second bias circuit output lines;
a first voltage controlled capacitor having a first lead connected to the first bias circuit output line; and
a second voltage controlled capacitor having a first lead connected to the second bias circuit output line; and
an output sense circuit having;
a first sense circuit input line connected to the second bias circuit output line;
a second sense circuit input line connected to the first bias circuit output line;
a first sense circuit output line; and
a second sense circuit output line.
1 Assignment
0 Petitions
Accused Products
Abstract
A microprocessor includes an on-chip low phase noise CMOS LC capacitance oscillator. The LC oscillator is relatively insensitive to power supply fluctuations. In addition, the LC oscillator is operable over a range of frequencies sufficient to support both normal full power operation, and reduced power operation of the microprocessor. The LC oscillator minimizes clock jitter problems and so permits extension of the microprocessor operating frequency to even higher levels than heretofore were possible. An output signal from a phase-frequency detector is a frequency control signal on a frequency control input line of a level converter and filter circuit of the LC oscillator. The output signal from level converter and filter circuit is a filtered frequency control signal on a control voltage input line to a continuously modifiable gigahertz frequency voltage controlled oscillator (VCO) circuit. Continuously modifiable gigahertz frequency VCO circuit generates an output signal with a frequency that is dependent on the voltage on control voltage input line. The output signal from the continuously modifiable gigahertz frequency VCO is a differential current signal to a level shifter output circuit. The level shifter output circuit converts the current signal to a single-ended voltage that is supplied to an output driver. The output driver provides the output signal to a clock distribution network.
50 Citations
29 Claims
-
1. An oscillator circuit comprising:
-
a bias circuit having a first bias circuit output line and a second bias circuit output line; a CMOS core oscillator circuit having; a spiral inductor connected between the first and second bias circuit output lines; a first voltage controlled capacitor having a first lead connected to the first bias circuit output line; and a second voltage controlled capacitor having a first lead connected to the second bias circuit output line; and an output sense circuit having; a first sense circuit input line connected to the second bias circuit output line; a second sense circuit input line connected to the first bias circuit output line; a first sense circuit output line; and a second sense circuit output line. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
-
-
13. An oscillator circuit comprising:
-
a bias circuit having a first bias circuit output line and a second bias circuit output line; a CMOS core oscillator circuit having; a spiral inductor connected between the first and second bias circuit output lines; a first voltage controlled capacitor having a first lead connected to the first bias circuit output line; and a second voltage controlled capacitor having a first lead connected to the second bias circuit output line; and a level shift and filter circuit having a control voltage output line connected to a second lead of the first voltage controlled capacitor, and to a second lead of the second voltage controlled capacitor. - View Dependent Claims (14)
-
-
15. An oscillator circuit comprising:
-
a bias circuit having a first bias circuit output line and a second bias circuit output line wherein the bias circuit further comprises a current mirror having an input branch and two output branches where the first bias circuit output line is connected to one of the two output branches, and the second bias circuit output line is connected to another of the two output branches; and a CMOS core oscillator circuit having; a spiral inductor connected between the first and second bias circuit output lines; a first voltage controlled capacitor having a first lead connected to the first bias circuit output line; and a second voltage controlled capacitor having a first lead connected to the second bias circuit output line. - View Dependent Claims (16, 17)
-
-
18. A LC oscillator circuit comprising:
-
a level shifter and filter circuit having a frequency control input line and a control voltage output line; a continuously modifiable gigahertz frequency voltage controlled oscillator connected to the control voltage output line, and having a plurality of output lines wherein an oscillation frequency of a signal on each of the plurality of output lines is determined by a level of a signal on the control voltage output line and wherein the continuously modifiable gigahertz frequency voltage controlled oscillator further comprises; a bias circuit having a first bias circuit output line and a second bias circuit output line; and a CMOS core oscillator circuit having; a spiral inductor connected between the first and second bias circuit output lines; a first voltage controlled capacitor having a first lead connected to the first bias circuit output line; and a second voltage controlled capacitor having a first lead connected to the second bias circuit output line; and a level shifter output circuit connected to the plurality of output lines of the continuously modifiable gigahertz frequency voltage controlled oscillator, and having an oscillator output line wherein the level shifter output circuit generates an oscillating signal on the oscillator output line in response to signals on the plurality of output lines of the continuously modifiable gigahertz frequency voltage controlled oscillator. - View Dependent Claims (19, 20, 21)
-
-
22. A CMOS core oscillator circuit comprising:
-
a spiral inductor connected between first and second constant current bias voltage lines; a first voltage controlled capacitor having a first lead connected to the first constant current bias voltage line; and a second voltage controlled capacitor having a first lead connected to the second constant current bias voltage line. - View Dependent Claims (23, 24, 25, 26, 27, 28, 29)
-
Specification