Inspection data analyzing apparatus for in-line inspection with enhanced display of inspection results

• US 6,016,562 A
• Filed: 08/28/1997
• Issued: 01/18/2000
• Est. Priority Date: 01/12/1996
• Status: Expired due to Fees

• Current Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation), Mitsubishi Electric Corporation
• Original Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Inventors: Izumitani, Junko, Hattori, Nobuyoshi, Miyazaki, Yoko, Ikeno, Masahiko
• Primary Examiner(s): Nguyen, Hoa T.
• Application Number:
  US08/919,166
• Time in Patent Office: 873 Days
• Field of Search: 714/724, 714/725, 714/718, 714/745, 324/73.1, 324/158.1, 382/309, 382/149, 356/237, 356/73.1
• US Class Current: 714/724
• CPC Class Codes: G01R 31/01 Subjecting similar articles in turn to test, e.g. "go/no-go" tests in mass production; Testing objects at points as they pass through a testing station testing of cables continuously passing the testing apparatus G01R31/59; testing dielectric strength or breakdown voltage G01R31/12
• CPC Class Codes: G01R 31/2831 Testing of materials or semi-finished products, e.g. semiconductor wafers or substrates G01R31/318511 takes precedence; testing during manufacture H01L22/00
• CPC Class Codes: H01L 22/12 for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions electrical measurement of diffusions H01L22/14

Abstract

An ordinary user can easily learn a step at which a problem occurs during semiconductor manufacturing processes and improve the yield of manufacturing products and the quality of the products. At a certain in-line inspection step, a CPU (3) stores data signals (V1) taken by an inspection apparatus (1) into a memory (2), and reads a result (V6) obtained at a precedent step and stores the same in the memory (2). The CPU (3) reads stored data signals (V2) from the memory (2), performs comparison or referral on data about defects which are detected at a current step and the result (V6) regarding the precedent step, and generates a defect data analysis processing result signal (V5) regarding the current step. The result (V5) consists of disappeared defect data, common defect data, new defect data to which a label of a current step number is assigned, and reappeared defect data. The CPU (3) performs the processing above for each in-line inspection step, edits resultant data, and generates histogram data which provide the number of detected defects and the number of disappeared defects for each step.

Claims

1. An inspection data analyzing apparatus for in-line inspection, which analyzes each one of detected defect data signals which are obtained on a semiconductor wafer and stored to generate stored detected defect data signals for each one of inspection steps which follows a corresponding optional step of semiconductor manufacturing steps, comprising:

(a) means for generating defect data analysis processing result signals which are related to a first one of said inspection steps, based on said stored detected defect data signals at said first one of said inspection steps, and generating subsequent defect data analysis processing result signals which are related to subsequent inspection steps, respectively, based on stored detected defect data signals at said subsequent inspection steps, respectively; and

(b) means for comparing said stored detected defect data signals at any of said inspection steps after said first inspection step with defect data analysis processing result signals which are related to a precedent one of said inspection steps which is immediately precedent to a current one of said inspection steps, to thereby generate defect data analysis processing result signals regarding said current one of said inspection steps;

wherein said defect data analysis processing result signals of said current one of said inspection steps comprise disappeared defect data signals and non-disappeared defect data signals,

said disappeared defect data signals provide data which are related to at least a disappeared defect which is judged as disappeared if said disappeared defect is detected at any one of said inspection steps which is prior to said current one of said inspection steps but is not detected at said current one of said inspection steps,

and said non-disappeared defect data signals provide data which are related to at least a non-disappeared defect which can be judged as non-disappeared since said non-disappeared defect is detected at said current one of said inspection steps.

2. The inspection data analyzing apparatus for in-line inspection according to claim 1, wherein said generating means (a) comprises:

(a-1) means for assigning a data signal which expresses a first step of said semiconductor manufacturing steps to each one of said detected defect data signals;

said comparing and generating means (b) comprises;

(b-1) means for performing said comparison to thereby judge whether a defect which is expressed by each one of said defect data analysis processing result signals regarding said precedent one of said inspection steps becomes said disappeared defect or said non-disappeared defect, and whether said defect which is expressed by each one of said detected defect data analysis processing result signals is a new defect which is detected for the first time at said current one of said inspection steps or not,

for newly assigning a label data signal which expresses a step number for one of said semiconductor manufacturing steps which corresponds to said current one of said inspection steps to a corresponding one of said detected defect data signals, to thereby set said corresponding one of said detected defect data signals to which said label data signal is assigned as one of said non-disappeared defect data signals when judging that said defect is said new defect; and

for assigning a corresponding previous label data signal which has already been assigned at said precedent one of said inspection steps to each one of said defect data analysis processing result signals regarding said precedent one of said inspection steps, to thereby set said each one of defect data analysis processing result signals as one of said disappeared defect data signals when judging that said defect is said disappeared defect and said set said each one of said defect data analysis processing result signals as one of said non-disappeared defect data signals when judging that said defect is said non-disappeared defect,

whereby creating said defect data analysis processing result signals regarding said current one of said inspection steps.

3. The inspection data analyzing apparatus for in-line inspection according to claim 2, wherein said non-disappeared defect data signals comprise common defect data signals, new defect data signals, and reappeared defect data signals,

said common defect data signals provide data about said defect which is detected at both said current one of said inspection steps and said precedent one of said inspection steps,

said new defect data signals provide data about said new defect,

said reappeared defect data signals provide data about said defect which is said disappeared defect at said precedent one of said inspection steps but is detected at said current one of said inspection steps, and

said (b-1) means for performing said comparison includes (b-1-1) means for comparing said each one of said detected defect data signals with said defect data analysis processing result signals regarding said precedent one of said inspection steps,

for setting said one of said disappeared defect data signals as one of said reappeared defect data signals of said defect data analysis processing result signals regarding said current one of said inspection steps when said one of said detected defect data signals coincides with one of said disappeared defect data signals,

for setting said one of said non-disappeared defect data signals as one of said common defect data signals of said defect data analysis processing result signals regarding said current one of said inspection steps when said one of said detected defect data signals coincides with one of said non-disappeared defect data signals, and

for setting said one of said detected defect data signals to which said label data signal is assigned as one of said new defect data signals of said defect data analysis processing result signals regarding said current one of said inspection steps when said one of said detected defect data signals does not coincide with any one of said defect data analysis processing result signals regarding said precedent one of said inspection steps;

and

(b-1-2) means for setting each one of both said disappeared defect data signals and said non-disappeared defect data signals which are included in said defect data analysis processing result signals regarding said precedent one of said inspection steps which do not coincide with any one of said detected defect data signals as said disappeared defect data signals of said defect data analysis processing result signals regarding said current one of said inspection steps.

4. The inspection data analyzing apparatus for in-line inspection according to claim 1, further comprising:

(c) means for generating data signals which provide physical quantities which express quantities of detected defects and quantities of disappeared defects for each one of said inspection steps after two or more steps of said inspection steps are complete, based on comparing said defect data analysis processing result signals with said stored defect data signals for each one of said inspection steps in said comparing and generating means (b).

5. The inspection data analyzing apparatus for in-line inspection according to claim 4, further comprising:

(d) means for displaying said physical quantities in a form of a histogram, in accordance with said data signals outputted by said data signals generating means (c).

6. The inspection data analyzing apparatus for in-line inspection according to claim 1, wherein said generating means (a) generates said defect data analysis processing result signals for each one of said inspection steps.

7. An inspection data analyzing apparatus for in-line inspection which analyzes detected defect data signals which are obtained on a semiconductor wafer by an inspection apparatus after any one of semiconductor manufacturing steps is complete, comprising:

(a) means for receiving said detected defect data signals and for obtaining data signals which provide defect densities per predetermined unit area, from said detected defect data signals;

(b) means for calculating and generating first drawing data signals based on said data signals which are obtained by said data signals receiving and obtaining means (a);

(c) means for generating second drawing data signals which provide a chip arrangement; and

(d) means for graphically displaying said first drawing data signals obtained by said calculating means (b), and said chip arrangement based on said second drawing data signals generated by said generating means (c).

8. The inspection data analyzing apparatus for in-line inspection according to claim 7, wherein

said generating means (c) further generates third drawing data signals which provide a defect distribution map of said semiconductor wafer, and

said displaying means (d) further graphically displays said defect distribution map of said semiconductor wafer generated by said generating means (c).

9. The inspection data analyzing apparatus for in-line inspection according to claim 7, wherein

the graphic display of said displaying means (d) is provided by a density profile curve.

10. An inspection data analyzing apparatus for in-line inspection which analyzes detected defect data signals which are obtained on a semiconductor wafer including at least one chip by an inspection apparatus, comprising:

(a) means for receiving said detected defect data signals and for classifying said detected defect data signals in accordance with a plurality of classification levels each assigned to a defect size range, to thereby generate drawing data signals which express positions of detected defects and provide different display forms based on said plurality of classification levels to which said classified detected defect data signals belong; and

(b) means for graphically displaying said display forms based on said drawing data signals which are obtained by said receiving and classifying means (a).

14. The inspection data analyzing apparatus for in-line inspection according to claim 10, wherein

said receiving and classifying means (a) obtains the drawing data signals per chip, and

said displaying means (b) graphically displays said defect density signals per chip based on said drawing data signals generated by said receiving and classifying means (a).

11. An inspection data analyzing apparatus for in-line inspection which analyzes detected defect data signals which are obtained on a semiconductor wafer by an inspection apparatus, comprising:

(a) means for receiving said detected defect data signals and for classifying said detected defect data signals in accordance with defect sizes thereof, to thereby generate drawing data signals which provide different display forms to said classified detected defect data signals; and

(b) means for graphically displaying said display forms based on said drawing data signals which are obtained by said receiving and classifying means (a);

wherein said receiving and classifying means (a) generates drawing data signals which provide a chip arrangement, and

said displaying means (b) graphically displays said display forms on said chip arrangement.

12. An inspection data analyzing apparatus for in-line inspection which analyzes detected defect data signals which are obtained on a semiconductor wafer by an inspection apparatus, comprising:

(a) means for receiving said detected defect data signals and for classifying said detected defect data signals in accordance with defect sizes thereof, to thereby generate drawing data signals which provide different display forms to said classified detected defect data signals; and

(b) means for graphically displaying said display forms based on said drawing data signals which are obtained by said receiving and classifying means (a);

wherein said receiving and classifying means (a) generates drawing data signals which provide a defect distribution map of said semiconductor wafer, and

said displaying means (b) graphically displays said display forms on said defect distribution map of said semiconductor wafer.

13. An inspection data analyzing apparatus for in-line inspection which analyzes detected defect data signals which are obtained on a semiconductor wafer by an inspection apparatus, comprising:

(a) means for receiving said detected defect data signals and for classifying said detected defect data signals in accordance with defect sizes thereof, to thereby generate drawing data signals which provide different display forms to said classified detected defect data signals; and

(b) means for graphically displaying said display forms based on said drawing data signals which are obtained by said receiving and classifying means (a);

wherein said receiving and classifying means (a) generates drawing data signals which provide a chip arrangement map and a defect distribution map of said semiconductor wafer as they overlap each other, and

said display means (b) graphically displays forms on said defect distribution map of said semiconductor wafer on which said chip arrangement map is drawn.

15. An inspection data analyzing apparatus for in-line inspection which analyzes detected defect data signals which are obtained on a semiconductor wafer by an inspection apparatus, comprising:

(a) means for receiving said detected defect data signals and for classifying said detected defect data signals in accordance with defect sizes thereof, to thereby generate drawing data signals which provide different display forms to said classified detected defect data signals; and

(b) means for graphically displaying said display forms based on said drawing data signals which are obtained by said receiving and classifying means (a);

said receiving and classifying means (a) obtains defect density data signals per chip;

said displaying means (b) graphically displays said display forms per chip based on said drawing data signals obtained by said receiving and classifying means (a); and

said receiving and classifying means (a) generates drawing data signals which provide a chip arrangement map and a defect distribution map of said semiconductor wafer as they overlap each other, and

said displaying means (b) graphically displays said forms on said defect distribution map of said semiconductor wafer on which said chip arrangement map is drawn.

16. An inspection data analyzing apparatus for in-line inspection which analyzes detected defect data signals which are obtained on a semiconductor wafer including at least one chip by an inspection apparatus after an optional point of time after two or more steps of inspection steps are complete, comprising:

(a) means for receiving said detected defect data signals and for obtaining defect density data signals which provide defect densities per chip based on said detected defect data signals, to thereby generate first drawing data signals for display values of said defect density data signals as numerical values, and second drawing data signals which provide a chip arrangement map and a defect distribution map of said semiconductor wafer as they overlap each other, for each one of inspection steps; and

(b) means for displaying both said first drawing data signals and said second drawing data signals which are obtained by said receiving and obtaining means (a), for each one of said inspection steps.

17. An inspection data analyzing apparatus for in-line inspection which analyzes detected defect data signals which are obtained on a semiconductor wafer including at least one chip by an inspection apparatus after two or more step of inspection steps are complete, comprising:

(a) means for receiving said detected defect data signals, for obtaining critical ratio data signals which provide defect critical ratios per chip based on said detected defect data signals, and for judging to which one of levels assigned in advance, each one of said critical ratio data signals belongs, to thereby generate first drawing data signals which provide each one of said levels to which each one of said critical ratio data signals belongs with predetermined display forms, for each one of inspection steps;

(b) means for generating second drawing data signals which provide a chip arrangement map and a defect distribution map of said semiconductor wafer as they overlap each other, for each one of said inspection steps; and

(c) means or graphically displaying said display forms based on said first and second drawing data signals for each one of said inspection steps.