Fabrication method for a thin film semiconductor device, the thin film semiconductor device itself, liquid crystal display, and electronic device

• US 6,017,779 A
• Filed: 02/13/1998
• Issued: 01/25/2000
• Est. Priority Date: 06/15/1994
• Status: Expired due to Term

• Current Assignee: Intellectual Keystone Technology LLC (Samsung Electronics Co. Ltd.)
• Original Assignee: Seiko Epson Corporation (Seiko Group)
• Inventors: Miyasaka, Mitsutoshi
• Primary Examiner(s): Niebling, John F.
• Assistant Examiner(s): LEBENTRITT, MICHAEL
• Application Number:
  US09/023,695
• Time in Patent Office: 711 Days
• Field of Search: 438/149, 438/166, 438/486
• US Class Current: 438/149
• CPC Class Codes: F16C 2360/45 Turbo-molecular pumps
• CPC Class Codes: F16C 29/00 Bearings for parts moving only linearly F16C32/06 takes precedence; incorporated in flexible shafts F16C1/28 ; parts of bearings in general and special methods for making bearings or parts thereof in general F16C33/00
• CPC Class Codes: G02F 1/13454 Drivers integrated on the active matrix substrate G02F1/136277 takes precedence
• CPC Class Codes: G02F 2202/104 poly-Si
• CPC Class Codes: H01L 21/0237 Materials
• CPC Class Codes: H01L 21/02521 Materials
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02576 N-type
• CPC Class Codes: H01L 21/02579 P-type
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/02661 In-situ cleaning
• CPC Class Codes: H01L 21/28079 the final conductor layer next to the insulator being a single metal, e.g. Ta, W, Mo, Al
• CPC Class Codes: H01L 21/3105 After-treatment
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H01L 29/78675 with normal-type structure, e.g. with top gate

Abstract

In order to fabricate a high performance thin film semiconductor device using a low temperature process in which it is possible to use low price glass substrates, a thin film semiconductor device has been fabricated by forming a silicon film at less than 450° C., and, after crystallization, keeping the maximum processing temperature at or below 350° C.

In applying the present invention to the fabrication of an active matrix liquid crystal display, it is possible to both easily and reliably fabricate a large, high-quality liquid crystal display. Additionally, in applying the present invention to the fabrication of other electronic circuits as well, it is possible to both easily and reliably fabricate high-quality electronic circuits.

Claims

1. A fabrication process for fabricating a thin film semiconductor device, comprising:

forming an underlevel protection layer comprising an insulating material formed on at least a portion of a substrate;

forming a semiconductor film on the underlevel protection layer the semiconductor film being an active layer of a transistor; and

melt crystallizing the semiconductor film, wherein a surface roughness of the underlevel protection layer has a center line mean roughness value of about 1.5 nm or less.

2. A fabrication process for fabricating a thin film semiconductor device using a single plasma enhanced chemical vapor deposition reactor, comprising:

removing films adhered in a deposition chamber of said plasma enhanced chemical vapor deposition reactor;

forming a passivation layer in said deposition chamber;

placing at least one substrate in said deposition chamber;

forming an underlevel protection layer on said in step 4, the at least one substrate;

forming a semiconductor layer on said underlevel protection layer; and

removing said at least one substrate from said deposition chamber.

3. A fabrication process for fabricating a thin film semiconductor device, comprising

forming an underlevel protection layer comprising an insulating material formed on at least a portion of each of a plurality of substrates;

placing the plurality of substrates in a deposition chamber of a low pressure chemical vapor deposition reactor, each of the plurality of substrates having a surface area S of about 90000 mm² or larger;

placing the plurality of substrates in the deposition chamber of the low pressure chemical vapor deposition reactor at a substrate spacing of d, where d≧

0.02×

S^1/2 ; and

forming a semiconductor film on the underlevel protection layer, the semiconductor film being an active layer of a transistor.

4. A fabrication process for fabricating a thin film semiconductor devices comprising:

forming an underlevel protection layer comprising an insulating material formed on at least a portion of a substrate; and

forming a silicon-containing semiconductor film on said underlevel protection layer, the silicon-containing semiconductor film being an active layer of a transistor, wherein the silicon-containing semiconductor film is formed with a low pressure chemical vapor deposition method using a higher silane as at least one type of source gas, the higher silane being Si_n H_2n+2, where n is an integer greater than or equal to 2 and wherein a deposition temperature of less than about 450°

C. is used to form the silicon-containing semiconductor film, the silicon-containing semiconductor film being deposited at a deposition rate of about 0.20 nm/min or more.

5. A fabrication process as described in claim 4, wherein the silicon-containing semiconductor film is formed at a deposition rate of about 0.60 nm/min or more.

6. A fabrication process for fabricating a thin film semiconductor device having an underlevel protection layer formed on a portion of a substrate and a semiconductor film formed on said underlevel protection layer, the underlevel protection layer comprising an insulating material and the semiconductor film being an active layer of a transistor, the process comprising:

forming the semiconductor film on top of said underlevel protection layer in a plasma enhanced chemical vapor deposition reactor; and

then

exposing said semiconductor film to a hydrogen plasma without breaking a vacuum of the plasma enhanced chemical vapor deposition reactor.

7. A fabrication process for fabricating a thin film semiconductor device having an underlevel protection layer formed on at least a portion of a substrate and a semiconductor film formed on said underlevel protection layer, the underlevel protection layer comprising an insulating material and the semiconductor film being an active layer of a transistor, the process comprising;

forming the semiconductor film on top of said underlevel protection layer in a plasma enhanced chemical vapor deposition reactor, and then

exposing said semiconductor film to an oxygen plasma without breaking a vacuum of the plasma enhanced chemical vapor deposition reactor.

8. A fabrication process for fabricating a thin film semiconductor device having an underlevel protection layer formed on at least a portion of a substrate and a semiconductor film formed on said underlevel protection layer, the underlevel protection layer comprising an insulating material and the semiconductor film being an active layer of a transistor, the process comprising:

forming the semiconductor film on top of said underlevel protection layer in a plasma enhanced chemical vapor deposition reactor;

then

exposing said semiconductor film to a hydrogen plasma without breaking a vacuum of the plasma enhanced chemical vapor deposition reactor, and then

exposing said semiconductor film to an oxygen plasma without breaking the vacuum of the plasma enhanced chemical vapor deposition reactor.

9. A fabrication process for fabricating a thin film semiconductor device having an underlevel protection layer formed on at least a portion of a substrate and a semiconductor film formed on said underlevel protection layer, the underlevel protection layer comprising an insulating material and the semiconductor film being an active layer of a transistor, the processing comprising:

forming the semiconductor film on top of the underlevel protection layer;

then

removing an oxide layer from the surface of said semiconductor film and then melt crystallizing the semiconductor film immediately after the removal of the oxide layer.

10. A fabrication process for fabricating a thin film semiconductor device having a semiconductor film formed on an insulating material and the insulating material formed on at least a portion of a surface of a substrate, said semiconductor film being an active layer of a transistor the process comprising:

depositing the semiconductor film using a low pressure chemical vapor deposition at a deposition temperature less than about 450°

C.;

irradiating said semiconductor film by one of optical and electromagnetic energy; and

depositing a gate insulator layer after formation of said semiconductor film;

wherein

a deposition temperature of the gate insulator layer and a processing temperature following fabrication of the gate insulator layer are at or below 350°

C.

11. A fabrication process as described in claim 10, wherein the deposition temperature of the semiconductor film is about 430°

C. or less.

12. A fabrication process for fabricating a thin film semiconductor device having a semiconductor film formed on an insulating material and the insulating material formed on at least a portion of a surface of a substrate, said semiconductor film being an active layer of a transistor, the process comprising:

forming the semiconductor film at a deposition temperature of about 350°

C. or less;

irradiating said semiconductor film by one of optical and electromagnetic energy; and

depositing a gate insulator layer after formation of said semiconductor film;

wherein

a deposition temperature of the gate insulator layer and a processing temperature following fabrication of the gate insulator layer are at or below 350°

C.

13. A fabrication process as described in claim 12, wherein the semiconductor film is formed by plasma enhanced chemical vapor deposition.

14. A fabrication process as described in claim 12, wherein the semiconductor film is formed by sputtering.

15. A fabrication process for fabricating a thin film semiconductor device having a semiconductor film formed on an insulating material and the insulating material formed on at least a portion of a surface of a substrates, said semiconductor film being an active layer of a transistor, the process comprising:

fabricating the semiconductor film by very high frequency plasma enhanced chemical vapor deposition; and

performing remaining processes at a maximum processing temperature of about 350°

C. or less.

16. A fabrication process as described in claim 15, wherein a thickness of said semiconductor film is between about 20 nm and 150 nm.

17. A fabrication process as described in claim 15, wherein the fabricating step comprises:

using a chemical species containing constitutive elements of said semiconductor film for a source gas and a noble gas for a dilution gas.

18. A fabrication process as described in claim 17, wherein the chemical species containing the constitutive elements of the semiconductor film is a silane.

19. A fabrication process as described in claim 17 wherein the noble gas is helium.

20. A fabrication process as described in claim 17, wherein the noble gas is neon.

21. A fabrication process as described in claim 17 wherein the noble gas is argon.

22. A fabrication process for fabricating a thin film semiconductor device having a crystalline semiconductor film formed on an insulating material and the insulating material formed on at least a portion of a surface of a substrate, said crystalline semiconductor film being an active layer of a transistor, the process comprising:

fabricating the crystalline semiconductor film by microwave plasma enhanced chemical vapor deposition; and

performing remaining processes at a maximum processing temperature of about 350°

C. or less.

23. A fabrication process as described in claim 22, wherein a film thickness of said crystalline semiconductor film is between about 20 nm and 150 nm.

24. A fabrication process as described in claim 22, wherein a chemical species containing constitutive elements of said crystalline semiconductor film is used as a source gas and a noble gas is used as a dilution gas.

25. A fabrication process as described in claim 24, wherein the chemical species containing the constitutive elements of the crystalline semiconductor film is a silane.

26. A fabrication process as described in claim 24, wherein the noble gas is helium.

27. A fabrication process as described in claim 24, wherein the noble gas is neon.

28. A fabrication process as described in claim 24 wherein the noble gas is argon.

29. A fabrication process for fabricating a thin film semiconductor device having a semiconductor film formed on an insulating material and the insulating material formed on at least a portion of a surface of a substrate, said semiconductor film being an active layer of a transistor, the process comprising:

fabricating the semiconductor film by very high frequency plasma enhanced chemical vapor deposition;

crystallizing said semiconductor film; and

performing remaining processes at a maximum processing temperature of about 350°

C. or less.

30. A fabrication process as described in claim 29, wherein a film thickness of the semiconductor film is between about 10 nm and 150 nm.

31. A fabrication process as described in claim 29, wherein during the fabricating step, a chemical species containing constitutive elements of said crystalline semiconductor film is used as a source gas and a noble gas is used as a dilution gas.

32. A fabrication process as described in claim 31, wherein the chemical species containing the constitutive elements of the semiconductor film is a silane.

33. A fabrication process as described in claim 31, wherein the noble gas is helium.

34. A fabrication process as described in claim 31, wherein the noble gas is neon.

35. A fabrication process as described in claim 31, wherein the noble gas is argon.

36. A fabrication process for fabricating a thin film semiconductor device having a crystalline semiconductor film formed on an insulating material and the insulating material formed on at least a portion of a surface of a substrate, said crystalline semiconductor film being an active layer of a transistor the process comprising:

fabricating the crystalline semiconductor film by microwave plasma enhanced chemical vapor deposition;

then

crystallizing said semiconductor film; and

performing remaining processes at a maximum processing temperature of about 350°

C. or less.

37. A process as described in claim 36, wherein a film thickness of the crystalline semiconductor film is between about 10 nm and 150 nm.

38. A fabrication process as described in claim 36 wherein during the fabricating step a chemical specie containing a constitutive elements of said crystalline semiconductor film is used as a source gas and a noble gas is used as a dilution gas.

39. A fabrication process as described in claim 38 wherein the chemical specie containing the constitutive elements of the crystalline semiconductor film is a silane.

40. A fabrication process as described in claim 38 wherein the noble gas is helium.

41. A fabrication process as described in claim 38 wherein the noble gas is neon.

42. A fabrication process as described in claim 38, wherein the noble gas is argon.