Method for forming high dielectric constant metal oxides

• US 6,020,024 A
• Filed: 08/04/1997
• Issued: 02/01/2000
• Est. Priority Date: 08/04/1997
• Status: Expired due to Term

• Current Assignee: VLSI Technology LLC (SoftBank Group Corp.)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Cuellar, Jesus, Tobin, Philip J., Maiti, Bikas, Hegde, Rama I.
• Primary Examiner(s): King, Roy V.
• Application Number:
  US08/905,755
• Time in Patent Office: 911 Days
• Field of Search: 427/99, 427/248.1, 427/527, 427/255.7, 427/309, 438/287, 438/439, 438/453, 204/192.15
• US Class Current: 438/287
• CPC Class Codes: H01L 21/28185 with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
• CPC Class Codes: H01L 21/28194 by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition H01L21/28202 takes precedence
• CPC Class Codes: H01L 21/28202 in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
• CPC Class Codes: H01L 21/2822 with substrate doping, e.g. N, Ge, C implantation, before formation of the insulator
• CPC Class Codes: H01L 29/4966 the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2 H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/517 the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence
• CPC Class Codes: H01L 29/518 the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
• CPC Class Codes: H01L 29/6659 with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET

Abstract

A method for forming a metal gate (20) structure begins by providing a semiconductor substrate (12). The semiconductor substrate (12) is cleaned to reduce trap sites. A nitrided layer (14) having a thickness of less than approximately 20 Angstroms is formed over the substrate (12). This nitrided layer prevents the formation of an oxide at the substrate interface and has a dielectric constant greater than 3.9. After the formation of the nitrided layer(14), a metal oxide layer (16) having a permittivity value of greater than roughly 8.0 is formed over the nitrided layer (14). A metal gate (20) is formed over the nitrided layer whereby the remaining composite gate dielectric (14 and 16) has a larger physical thickness but a high-performance equivalent oxide thickness (EOT).

Claims

1. A method for forming a semiconductor structure, the method comprising the steps of:

providing a semiconductor substrate having a surface;

forming an oxidation barrier layer over the surface of the semiconductor substrate;

forming a metal oxide layer over the oxidation barrier layer; and

forming a gate electrode overlying the metal oxide layer and forming source and drain electrodes within the semiconductor substrate wherein the gate electrode controls current flow between source and drain electrodes using the oxidation barrier layer and the metal oxide layer as a composite gate dielectric layer.

2. The method of claim 1 wherein the step of forming a metal oxide layer comprises:

selecting a metal oxide layer which is not chemically stable in a presence of silicon.

3. The method of claim 2 wherein the step of forming a metal oxide layer comprises:

selecting the metal oxide layer from the group consisting of;

tantalum pentoxide (Ta₂ O₅), titanium dioxide (TiO₂), lead zirconium titanate (PZT), barium strontium titanate (BST), strontium bismuth titantate (SBT), and niobium oxide (Nb₂ O₃ or Nb₂ O₅).

4. The method of claim 1 wherein the step of forming a metal oxide layer comprises:

selecting a metal oxide layer which is chemically stable in a presence of silicon.

5. The method of claim 4 wherein the step of forming a metal oxide layer comprises:

selecting the metal oxide layer from the group consisting of;

yttrium oxide (Y₂ O₃), zirconium oxide (ZrO₂), calcium oxide (CaO), beryllium oxide (BeO), and magnesium oxide (MgO).

6. The method of claim 1 wherein the step of forming a metal oxide layer comprises:

sputtering a metallic material on the oxidation barrier layer; and

exposing the metallic material to an oxidation environment wherein the oxidation environment changes the metallic material to a metal oxide material, wherein the oxidation barrier layer prevents a region of the semiconductor substrate that is in close proximity to the composite gate dielectric layer from being significantly oxidized.

7. The method of claim 1 wherein the step of forming a metal oxide layer comprises:

chemical vapor depositing a metallic oxide material on the oxidation barrier layer; and

exposing the metallic oxide material to an anneal environment wherein the anneal environment reduces oxygen vacancies and improves the bonding in the metallic oxide material, wherein the oxidation barrier layer prevents a region of the semiconductor substrate that is in close proximity to the composite gate dielectric layer from being significantly oxidized.

8. The method of claim 1 wherein the step of forming a gate electrode comprises:

forming the gate electrode having a lower portion made of a metallic material and an upper portion made of a polysilicon material.

9. The method of claim 8 wherein the step of forming a gate electrode comprises:

siliciding a top portion of the polysilicon material to form a top silicide portion of the gate electrode.

10. The method of claim 1 wherein the step of forming the oxidation barrier layer comprises:

forming the oxidation barrier layer as an oxynitride layer.

11. The method of claim 10 wherein the step of forming the oxidation barrier layer comprises:

exposing the semiconductor substrate to an environment provided with a source gas selected from the group consisting of;

N₂ O, NO, NH₃, and N₂.

12. The method of claim 10 wherein the step of forming the oxidation barrier layer comprises:

ion implanting an oxide formed over the semiconductor substrate with nitrogen atoms.

13. The method of claim 1 wherein the step of forming the oxidation barrier layer comprises:

forming the oxidation barrier layer between 2 angstroms and 15 angstroms in thickness.

14. The method of claim 1 wherein the step of forming the oxidation barrier layer comprises:

forming the oxidation barrier layer having a dielectric constant greater than 3.9.

15. The method of claim 1 wherein the steps of forming the oxidation barrier layer and the metal oxide layer comprises:

forming the oxidation barrier layer as a material that is chemically stable when exposed to silicon; and

forming the metal oxide layer as a layer which is not stable in a presence of silicon.

16. The method of claim 1 wherein the step of forming the oxidation barrier layer comprises:

cleaning the semiconductor substrate with HF and passivating a top surface of the semiconductor substrate with a H₂ environment before formation of the oxidation barrier layer.

17. The method of claim 1 wherein the step of forming the metal oxide layer comprises:

forming the metal oxide layer as a composite metal oxide layer having a first metal oxide layer overlying a second metal oxide layer wherein the first metal oxide layer is different from the second metal oxide layer.

18. The method of claim 17 wherein the step of forming the metal oxide layer comprises:

forming the first metal oxide layer by depositing one or more atomic layers via atomic layer epitaxy; and

forming the second metal oxide layer by depositing one or more atomic layers via atomic layer epitaxy.

19. The method of claim 1 wherein the step of forming the oxidation barrier layer comprises:

ion implanting nitrogen atoms into the semiconductor substrate to form silicon nitride as the oxidation barrier layer.

20. The method of claim 1 further comprising the step of:

passivating a surface of the semiconductor substrate so that oxidation on the semiconductor substrate is reduced before the oxidation barrier is formed.

21. The method of claim 1 wherein the step of forming the gate electrode comprises:

forming the gate electrode having a TiN portion and a W portion to reduce stress in the semiconductor structure.

22. A method for forming a semiconductor structure, the method comprising the steps of:

providing a semiconductor substrate having a surface;

forming an oxidation barrier layer over the surface of the semiconductor substrate by exposing the semiconductor substrate to a nitrogen environment, the oxidation barrier layer having a dielectric constant between 3.9 and 8.0;

forming a metal oxide layer over the oxidation barrier layer, the metal oxide layer having a dielectric constant above 7.8;

forming a metallic gate electrode overlying the metal oxide layer; and

forming source and drain electrodes within the semiconductor substrate and self-aligned to the metallic gate electrode wherein the gate electrode controls current flow between source and drain electrodes using the oxidation barrier layer and the metal oxide layer as a composite gate dielectric layer.

23. The method of claim 22 wherein the steps of forming the oxidation barrier layer and the metal oxide layer comprises:

forming the oxidation barrier layer as a material that is chemically stable when exposed to silicon; and

forming the metal oxide layer as a layer which is not stable in contact with silicon.

24. The method of claim 22 wherein the step of forming a metal oxide layer comprises:

sputtering a metallic material on the oxidation barrier layer; and

exposing the metallic material to an oxidation environment wherein the oxidation environment changes the metallic material to a metal oxide material, wherein the oxidation barrier layer prevents a region of the semiconductor substrate that is in close proximity to the composite gate dielectric layer from being significantly oxidized.

25. The method of claim 22 wherein the step of forming a metal oxide layer comprises:

chemical vapor depositing a metallic oxide material on the oxidation barrier layer; and

exposing the metallic oxide material to an oxidation environment wherein the oxidation environment anneals oxygen vacancies in the metallic oxide material, wherein the oxidation barrier layer prevents a region of the semiconductor substrate that is in close proximity to the composite gate dielectric layer from being significantly oxidized.

26. A method for forming a semiconductor structure, the method comprising the steps of:

providing a silicon substrate;

annealing the silicon substrate in a hydrogen-containing environment to passivate a surface of the silicon substrate;

forming an oxidation barrier layer over the surface of the silicon substrate by exposing the semiconductor substrate to a nitrogen environment, the oxidation barrier layer having a dielectric constant between 3.9 and 8.0 and being chemically stable in contact to silicon;

forming a metal oxide layer over the oxidation barrier layer, the metal oxide layer having a dielectric constant above 7.8 and being chemically unstable in contact to silicon;

forming a metallic gate electrode overlying the metal oxide layer wherein a lower portion of the metallic gate electrode is made of a metal material, a middle portion of the metallic gate electrode is made of polysilicon, and an upper portion of the metallic gate electrode is made of a silicide material; and

forming source and drain electrodes within the silicon substrate and self-aligned to the metallic gate electrode wherein the gate electrode controls current flow between source and drain electrodes using the oxidation barrier layer and the metal oxide layer as a composite gate dielectric layer.