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Fast frame buffer system architecture for video display system

  • US 6,020,901 A
  • Filed: 06/30/1997
  • Issued: 02/01/2000
  • Est. Priority Date: 06/30/1997
  • Status: Expired due to Term
First Claim
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1. A frame buffer system for use with a video display system that is useable with a computer system, comprising:

  • a frame buffer random access memory sub-system (FBRAM) including a source of digital video data, said FBRAM sub-system storing processed said video data to be displayed by said video display system;

    a controller unit including a video refresh generator and a command unit coupled to said video refresh generator, coupled to said FBRAM sub-system and to said computer system, said command unit and said video refresh generator providing transfer commands to said FBRAM sub-system including at least one command reflecting state of video refresh required for said video display system; and

    a digital-to-analog converter sub-system, coupled to said controller unit and to said FBRAM sub-system, for format-converting said video data for display by said video display system, said digital-to-analog converter sub-system further including a video timing generator that provides timing signals to said frame buffer system.

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