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Data processing system having memory sub-array redundancy and method therefor

  • US 6,021,512 A
  • Filed: 11/27/1996
  • Issued: 02/01/2000
  • Est. Priority Date: 11/27/1996
  • Status: Expired due to Term
First Claim
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1. A data processing system, comprising:

  • a central processing unit for providing a plurality of address values and a plurality of data values;

    a memory coupled to the central processing unit for receiving the plurality of address values and communicating the plurality of data values;

    a redundant memory array coupled to the central processing unit for receiving the plurality of address values and selectively communicating the plurality of data values, the redundant memory array, comprising;

    a plurality of memory cells; and

    a wordline decoder coupled only to the plurality of memory cells; and

    a multiplexer coupled to the memory for receiving a first data value and coupled to the redundant memory array for receiving a first redundant data value, the multiplexer selectively providing one of the first data value and the first redundant data value as a data output value.

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